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STM8S005C6T6 数据表(PDF) 37 Page - STMicroelectronics |
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STM8S005C6T6 数据表(HTML) 37 Page - STMicroelectronics |
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37 / 103 page  Reset status Register name Register label Block Address 0x00 TIM3 status register 2 TIM3_SR2 0x00 5323 0x00 TIM3 event generation register TIM3_EGR 0x00 5324 0x00 TIM3 capture/ compare mode register 1 TIM3_CCMR1 0x00 5325 0x00 TIM3 capture/ compare mode register 2 TIM3_CCMR2 0x00 5326 0x00 TIM3 capture/ compare enable register 1 TIM3_CCER1 0x00 5327 0x00 TIM3 counter high TIM3_CNTRH 0x00 5328 0x00 TIM3 counter low TIM3_CNTRL 0x00 5329 0x00 TIM3 prescaler register TIM3_PSCR 0x00 532A 0xFF TIM3 auto-reload register high TIM3_ARRH 0x00 532B 0xFF TIM3 auto-reload register low TIM3_ARRL 0x00 532C 0x00 TIM3 capture/ compare register 1 high TIM3_CCR1H 0x00 532D 0x00 TIM3 capture/ compare register 1 low TIM3_CCR1L 0x00 532E 0x00 TIM3 capture/ compare register 2 high TIM3_CCR2H 0x00 532F 0x00 TIM3 capture/ compare register 2 low TIM3_CCR2L 0x00 5330 Reserved area (15 bytes) 0x00 5331 to 0x00 533F 0x00 TIM4 control register 1 TIM4_CR1 TIM4 0x00 5340 0x00 TIM4 interrupt enable register TIM4_IER 0x00 5341 0x00 TIM4 status register TIM4_SR 0x00 5342 37/103 DocID022186 Rev 3 Memory and register map STM8S005K6 STM8S005C6 |
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