STM32F107VC datasheet(65/103 Pages) STMICROELECTRONICS

65 / 103 page

STM32F105xx, STM32F107xx

Electrical characteristics

Doc ID 15274 Rev 6

65/104

I2S - SPI interface characteristics

Unless otherwise specified, the parameters given in Table 43 for SPI or in Table 44 for I2S

are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD

supply voltage conditions summarized in Table 9.

Refer to Section 5.3.12: I/O current injection characteristics for more details on the

input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK,

SD for I2S).

Table 43.

SPI characteristics

Symbol

Parameter

Conditions

Min

Max

Unit

fSCK

1/tc(SCK)

SPI clock frequency

Master mode

MHz

Slave mode

tr(SCK)

tf(SCK)

SPI clock rise and fall

time

Capacitive load: C = 30 pF

DuCy(SCK)

SPI slave input clock

duty cycle

Slave mode

tsu(NSS)

NSS setup time

Slave mode

4 tPCLK

th(NSS)

NSS hold time

Slave mode

2 tPCLK

tw(SCKH)

tw(SCKL)

SCK high and low time

Master mode, fPCLK = 36 MHz,

presc = 4

tsu(MI)

Data input setup time

Master mode

tsu(SI)

Slave mode

th(MI)

Data input hold time

Master mode

th(SI)

Slave mode

ta(SO)

Data output access

time

Slave mode, fPCLK = 20 MHz

3*tPCLK

tv(SO)

Data output valid time

Slave mode (after enable edge)

tv(MO)

Data output valid time

Master mode (after enable edge)

th(SO)

Data output hold time

Slave mode (after enable edge)

th(MO)

Master mode (after enable edge)

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