| 数据搜索系统,热门电子元器件搜索 |
|
AS1374 数据表(PDF) 3 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS1374 数据表(HTML) 3 Page - ams AG |
|
3 / 19 page ![]() AS1374 Datasheet - Pin Assignm ents www.austriamicrosystems.com/LDOs/AS1374 Revision 1.8 2 - 18 4 Pin Assignments Figure 2. Pin Assignments (Top View) 4.1 Pin Descriptions Table 1. Pin Descriptions Pin Number Pin Name Description 1OUT 2 Regulated Output Voltage 2. Bypass this pin with a capacitor to GND. See Application Information for capacitor selection. 2VDD Input Supply 3OUT 1 Regulated Output Voltage 1. Bypass this pin with a capacitor to GND. See Application Information for capacitor selection. 4EN 2 Enable 2. Pull this pin to logic low to disable Regulated Output 2 voltage. 5GND Ground 6EN 1 Enable 1. Pull this pin to logic low to disable Regulated Output 1 voltage. AS1374 4 13 6 5 2 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |