AS3687 datasheet(48/55 Pages) AMSCO

48 / 55 page

AS3687/87XM

Datasheet

www.austriamicrosystems.com/AS3687

1v3-4

47 - 54

Figure

40 – Serial Interface Sequential Read

A Sr

data 1

data 2

...

data n

N P

Read Register

WA++

AS3687/87XM

(= Slave) receives data

AS3687/87XM

(= Slave) transmits data

Sequential Read is the extended form of Random Read, as multiple register-data bytes are subsequently

transferred.

In contrast to the Random Read, in a sequential read the transferred register-data bytes are responded by an

acknowledge from the master. The number of data bytes transferred in one sequence is unlimited (consider the

behavior of the word-address counter). To terminate the transmission the master has to send a NOT

ACKNOWLEDGE following the last data byte and subsequently generate the STOP condition.

Figure

41 – Serial Interface Current Address Read

data 1

data 2

…

data n

N P

Read Register

WA++

Read Register

WA++

Read Register

WA++

Read Register

WA++

AS3687 (= slave) receives data

AS3687 (= slave) transmits data

To keep the access time as small as possible, this format allows a read access without the word address transfer

in advance to the data transfer. The bus is idle and the master issues a START condition followed by the Device-

Read address.

Analogous to Random Read, a single byte transfer is terminated with a NOT ACKNOWLEDGE after the 1st

data bytes must be responded to with an ACKNOWLEDGE from the master.

For termination of the transmission the master sends a NOT ACKNOWLEDGE following the last data byte and a

subsequent STOP condition.

7.10 Operating Modes

If the voltage on SCL and SDA is less than 1V (for > tPOR_DEB), the AS3687/87XM is in shutdown mode and its

current consumption is minimized (IBAT = ISHUTDOWN) and all internal registers are reset to their default values.

If the voltage at SCL or SDA rises above 1V, the AS3687/87XM serial interface is enabled and the AS3687/87XM

and the standby mode is selected. The AS3687/87XM is switched automatically from standby mode (I(BAT) =

ISTANDBY) into normal mode (I(BAT) = IACTIVE) and back, if one of the following blocks are activated:

Charge pump

Step up regulator

Any current sink

ADC conversion started

PWM active

Pattern mode active.

If any of these blocks are already switched on the internal oscillator is running and a write instruction to the

registers is directly evaluated within 1 internal CLK Cycle (typ. 1μs)

If all these blocks are disabled, a write instruction to enable these blocks is delayed by 64 CLK cycles (oscillator

will startup, within max 200μs).

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