1

Features

– Single Cycle Reprogram (Erase and Program)

– 4096 Pages (264 Bytes/Page) Main Memory

Reprogramming of Non-Volatile Memory

µµµµs Typical Page to Buffer Transfer Time

– 4 mA Active Read Current Typical

–2

µµµµA CMOS Standby Current Typical

Description

The AT45DB080 is a 2.7-volt only, sequential access, parallel interface Flash memory

suitable for in-system reprogramming. Its 8,650,752 bits of memory are organized as

4096 pages of 264-bytes each. In addition to the main memory, the AT45DB080 also

contains two data buffers of 264-bytes each. The buffers allow receiving of data while

a page in the main memory is being reprogrammed. Unlike conventional Flash memo-

ries that are accessed randomly with multiple address lines and a parallel interface,

8-Megabit

2.7-volt Only

Sequential

Access

Parallel I/O

DataFlash

®

AT45DB080

Preliminary

Rev. 1075B–06/98

(continued)

Pin Configurations

Pin Name

Function

CS

Chip Select

CLK

Clock

I/O7-I/O0

Input/Output

WP

Hardware Page

Write Protect Pin

RESET

Chip Reset

RDY/BUSY

Ready/Busy

SOIC

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

GND

NC

NC

CS

CLK

DC

DC

NC

NC

I/O0

I/O1

I/O2

I/O3

GND

VCC

NC

NC

WP

RESET

RDY/BUSY

NC

NC

NC

I/O7

I/O6

I/O5

I/O4

VCC

TSOP Top View

Type 1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

RDY/BUSY

RESET

WP

NC

NC

NC

VCC

GND

NC

NC

NC

NC

CS

CLK

DC

DC

NC

NC

NC

I/O7

I/O6

I/O5

I/O4

VCC

GND

I/O3

I/O2

I/O1

I/O0

NC

NC

NC

Note:

SOIC pins 6 and 7 and TSOP pins 15 and 16 are DON’T CONNECT.