I2CSTAT datasheet(205/210 Pages) MICROCHIP

205 / 210 page

DS70139G-page 205

dsPIC30F2011/2012/3012/3013

Reset......................................................................... 165

Simple OC/PWM Mode............................................. 171

SPI Module

Master Mode (CKE = 0) .................................... 172

Master Mode (CKE = 1) .................................... 173

Slave Mode (CKE = 0) ...................................... 174

Slave Mode (CKE = 1) ...................................... 176

Type A Timer External Clock .................................... 167

Type B Timer External Clock .................................... 168

Type C Timer External Clock .................................... 168

Watchdog Timer........................................................ 165

Timing Specifications

PLL Clock.................................................................. 162

Trap Vectors ....................................................................... 69

UART Module

Address Detect Mode ............................................... 109

Auto-Baud Support ................................................... 109

Baud Rate Generator................................................ 109

Enabling and Setting Up ........................................... 107

Framing Error (FERR)............................................... 109

Idle Status ................................................................. 109

Loopback Mode ........................................................ 109

Operation During CPU Sleep and Idle Modes .......... 110

Overview ................................................................... 105

Parity Error (PERR) .................................................. 109

Receive Break........................................................... 109

Receive Buffer (UxRXB) ........................................... 108

Receive Buffer Overrun Error (OERR Bit) ................ 108

Receive Interrupt....................................................... 108

Receiving Data.......................................................... 108

Receiving in 8-bit or 9-bit Data Mode........................ 108

Reception Error Handling.......................................... 108

Transmit Break.......................................................... 108

Transmit Buffer (UxTXB)........................................... 107

Transmit Interrupt...................................................... 108

Transmitting Data...................................................... 107

Transmitting in 8-bit Data Mode................................ 107

Transmitting in 9-bit Data Mode................................ 107

UART1 Register Map................................................ 111

UART2 Register Map................................................ 111

UART Operation

Idle Mode .................................................................. 110

Sleep Mode............................................................... 110

Unit ID Locations............................................................... 123

Universal Asynchronous Receiver Transmitter

(UART) Module ......................................................... 105

Wake-up from Sleep ......................................................... 123

Wake-up from Sleep and Idle ............................................. 70

Watchdog Timer

Timing Characteristics .............................................. 165

Timing Requirements................................................ 165

Watchdog Timer (WDT) ............................................ 123, 133

Enabling and Disabling ............................................. 133

Operation .................................................................. 133

WWW Address.................................................................. 205

WWW, On-Line Support ....................................................... 9

I2CSTAT 数据表(PDF) 205 Page - Microchip Technology

I2CSTAT 数据表(HTML) 205 Page - Microchip Technology

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