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I2CSTAT 数据表(PDF) 202 Page - Microchip Technology

部件名 I2CSTAT
功能描述  High-Performance, 16-bit Digital Signal Controllers
PDF  210 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

I2CSTAT 数据表(HTML) 202 Page - Microchip Technology

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dsPIC30F2011/2012/3012/3013
DS70139G-page 202
© 2010 Microchip Technology Inc.
Erasing, Word ............................................................. 56
Protection Against Spurious Write .............................. 58
Reading....................................................................... 55
Write Verify ................................................................. 58
Writing ......................................................................... 57
Writing, Block .............................................................. 57
Writing, Word .............................................................. 57
DC Characteristics ............................................................ 150
BOR .......................................................................... 158
Brown-out Reset ....................................................... 158
I/O Pin Input Specifications ....................................... 156
I/O Pin Output Specifications .................................... 156
Idle Current (IIDLE) .................................................... 153
Low-Voltage Detect................................................... 157
LVDL ......................................................................... 157
Operating Current (IDD)............................................. 152
Power-Down Current (IPD) ........................................ 154
Program and EEPROM............................................. 159
Temperature and Voltage Specifications .................. 150
Development Support ....................................................... 145
Device Configuration
Register Map............................................................. 136
Device Configuration Registers
FBORPOR ................................................................ 134
FGS........................................................................... 134
FOSC ........................................................................ 134
FWDT........................................................................ 134
Device Overview ........................................................... 11, 19
Disabling the UART........................................................... 107
Divide Support..................................................................... 22
Instructions (Table) ..................................................... 22
DSP Engine......................................................................... 23
Multiplier...................................................................... 25
Dual Output Compare Match Mode .................................... 88
Continuous Pulse Mode .............................................. 88
Single Pulse Mode ...................................................... 88
E
Electrical Characteristics
AC ............................................................................. 160
DC ............................................................................. 150
Enabling and Setting Up UART
Alternate I/O .............................................................. 107
Setting Up Data, Parity and Stop Bit Selections ....... 107
Enabling the UART ........................................................... 107
Equations
ADC Conversion Clock ............................................. 115
Baud Rate ................................................................. 109
Serial Clock Rate ...................................................... 102
Errata .................................................................................... 9
Exception Sequence
Trap Sources .............................................................. 67
External Clock Timing Characteristics
Type A, B and C Timer ............................................. 167
External Clock Timing Requirements................................ 161
Type A Timer ............................................................ 167
Type B Timer ............................................................ 168
Type C Timer ............................................................ 168
External Interrupt Requests ................................................ 70
F
Fast Context Saving............................................................ 70
Flash Program Memory....................................................... 49
I
I/O Pin Specifications
Input.......................................................................... 156
Output ....................................................................... 156
I/O Ports.............................................................................. 59
Parallel (PIO) .............................................................. 59
I2C 10-bit Slave Mode Operation........................................ 99
Reception ................................................................. 100
Transmission ............................................................ 100
I2C 7-bit Slave Mode Operation.......................................... 99
Reception ................................................................... 99
Transmission .............................................................. 99
I2C Master Mode Operation.............................................. 101
Baud Rate Generator ............................................... 102
Clock Arbitration ....................................................... 102
Multi-Master Communication,
Bus Collision and Bus Arbitration ..................... 102
Reception ................................................................. 102
Transmission ............................................................ 101
I2C Master Mode Support ................................................. 101
I2C Module
Addresses................................................................... 99
Bus Data Timing Characteristics
Master Mode..................................................... 177
Slave Mode....................................................... 179
Bus Data Timing Requirements
Master Mode..................................................... 178
Slave Mode....................................................... 179
Bus Start/Stop Bits Timing Characteristics
Master Mode..................................................... 177
Slave Mode....................................................... 179
General Call Address Support .................................. 101
Interrupts .................................................................. 101
IPMI Support............................................................. 101
Operating Function Description .................................. 97
Operation During CPU Sleep and Idle Modes .......... 102
Pin Configuration ........................................................ 97
Programmer’s Model .................................................. 97
Register Map ............................................................ 103
Registers .................................................................... 97
Slope Control ............................................................ 101
Software Controlled Clock Stretching (STREN = 1) . 100
Various Modes............................................................ 97
Idle Current (IIDLE) ............................................................ 153
In-Circuit Serial Programming (ICSP)......................... 49, 123
Input Capture (CAPX) Timing Characteristics .................. 169
Input Capture Module ......................................................... 83
Interrupts .................................................................... 84
Register Map .............................................................. 85
Input Capture Operation During Sleep and Idle Modes...... 84
CPU Idle Mode ........................................................... 84
CPU Sleep Mode ........................................................ 84
Input Capture Timing Requirements................................. 169
Input Change Notification Module....................................... 63
dsPIC30F2012/3013 Register Map (Bits 7-0)............. 63
Instruction Addressing Modes ............................................ 43
File Register Instructions ............................................ 43
Fundamental Modes Supported ................................. 43
MAC Instructions ........................................................ 44
MCU Instructions ........................................................ 43
Move and Accumulator Instructions............................ 44
Other Instructions ....................................................... 44
Instruction Set
Overview................................................................... 140
Summary .................................................................. 137
Internal Clock Timing Examples ....................................... 163
Internet Address ............................................................... 205



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