I2CSTAT datasheet(201/210 Pages) MICROCHIP

201 / 210 page

DS70139G-page 201

dsPIC30F2011/2012/3012/3013

INDEX

Numerics

12-bit Analog-to-Digital Converter (A/D) Module .............. 113

A/D .................................................................................... 113

Aborting a Conversion .............................................. 115

ADCHS Register ....................................................... 113

ADCON1 Register..................................................... 113

ADCON2 Register..................................................... 113

ADCON3 Register..................................................... 113

ADCSSL Register ..................................................... 113

ADPCFG Register..................................................... 113

Configuring Analog Port Pins.............................. 60, 119

Connection Considerations....................................... 119

Conversion Operation ............................................... 114

Effects of a Reset...................................................... 118

Operation During CPU Idle Mode ............................. 118

Operation During CPU Sleep Mode.......................... 118

Output Formats ......................................................... 118

Power-Down Modes.................................................. 118

Programming the Sample Trigger............................. 115

Result Buffer ............................................................. 114

Sampling Requirements............................................ 117

Selecting the Conversion Sequence......................... 114

AC Characteristics ............................................................ 160

Load Conditions ........................................................ 160

AC Temperature and Voltage Specifications .................... 160

ADC

Selecting the Conversion Clock ................................ 115

ADC Conversion Speeds .................................................. 116

Address Generator Units .................................................... 43

Alternate Vector Table ........................................................ 69

Analog-to-Digital Converter. See ADC.

Assembler

MPASM Assembler................................................... 146

Automatic Clock Stretch.................................................... 100

During 10-bit Addressing (STREN = 1)..................... 100

During 7-bit Addressing (STREN = 1)....................... 100

Receive Mode ........................................................... 100

Transmit Mode .......................................................... 100

Bandgap Start-up Time

Requirements............................................................ 166

Timing Characteristics .............................................. 166

Barrel Shifter ....................................................................... 27

Bit-Reversed Addressing .................................................... 46

Example ...................................................................... 47

Implementation ........................................................... 46

Modifier Values Table ................................................. 47

Sequence Table (16-Entry)......................................... 47

Block Diagrams

12-bit ADC Functional............................................... 113

16-bit Timer1 Module .................................................. 73

16-bit Timer2............................................................... 79

16-bit Timer3............................................................... 79

32-bit Timer2/3............................................................ 78

DSP Engine ................................................................ 24

dsPIC30F2011 ............................................................ 12

dsPIC30F2012 ............................................................ 13

dsPIC30F3013 ............................................................ 15

External Power-on Reset Circuit............................... 131

I2C .............................................................................. 98

Input Capture Mode.................................................... 83

Oscillator System...................................................... 125

Output Compare Mode ............................................... 87

Reset System ........................................................... 129

Shared Port Structure................................................. 59

SPI.............................................................................. 94

SPI Master/Slave Connection..................................... 95

UART Receiver......................................................... 106

UART Transmitter..................................................... 105

BOR Characteristics ......................................................... 158

BOR. See Brown-out Reset.

Brown-out Reset

Characteristics.......................................................... 158

Timing Requirements ............................................... 165

C Compilers

MPLAB C18.............................................................. 146

CAN Module

I/O Timing Characteristics ........................................ 181

I/O Timing Requirements.......................................... 181

CLKOUT and I/O Timing

Characteristics.......................................................... 164

Requirements ........................................................... 164

Code Examples

Data EEPROM Block Erase ....................................... 56

Data EEPROM Block Write ........................................ 58

Data EEPROM Read.................................................. 55

Data EEPROM Word Erase ....................................... 56

Data EEPROM Word Write ........................................ 57

Erasing a Row of Program Memory ........................... 51

Initiating a Programming Sequence ........................... 52

Loading Write Latches................................................ 52

Code Protection ................................................................ 123

Control Registers ................................................................ 50

NVMADR .................................................................... 50

NVMADRU ................................................................. 50

NVMCON.................................................................... 50

NVMKEY .................................................................... 50

Core Architecture

Overview..................................................................... 19

CPU Architecture Overview ................................................ 19

Customer Change Notification Service............................. 205

Customer Notification Service .......................................... 205

Customer Support............................................................. 205

Data Accumulators and Adder/Subtractor .......................... 25

Data Space Write Saturation ...................................... 27

Overflow and Saturation ............................................. 25

Round Logic ............................................................... 26

Write-Back .................................................................. 26

Data Address Space........................................................... 35

Alignment.................................................................... 38

Alignment (Figure) ...................................................... 38

Effect of Invalid Memory Accesses (Table) ................ 38

MCU and DSP (MAC Class) Instructions Example .... 37

Memory Map......................................................... 35, 36

Near Data Space ........................................................ 39

Software Stack ........................................................... 39

Spaces........................................................................ 38

Width .......................................................................... 38

Data EEPROM Memory...................................................... 55

Erasing ....................................................................... 56

Erasing, Block............................................................. 56

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