SCF5250 datasheet(49/56 Pages) FREESCALE

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SCF5250 Data Sheet: Technical Data, Rev. 1.3

Freescale Semiconductor

G13

RXD1_GP46

I/O

UART1 receive data input

Out / Low

G12

PST3_INTMON1_GP47

I/O

Debug / interrupt monitor output 1

Out / High

F12

PST2_INTMON2_GP48

I/O

Debug / interrupt monitor output 2

Out / High

P_GND

PAD_GND

I/O

PAD_GND

F14

PST1_GP49

I/O

Debug

Out / High

F13

PST0_GP50

I/O

Debug

Out / High

E14

PSTCLK_GP51

I/O

Debug

Out / clock output

E13

TDO_DSO

JTAG / Debug

BDM

D13

TDI_DSI

JTAG / Debug

BDM

E12

TCK

JTAG

BDM

C13

TMS_BKPT

JTAG / Debug

BDM

D12

TRST_DSCLK

JTAG / Debug

BDM

D14

RSTI

Reset

C14

SCLK2_GP22

I/O

Audio interfaces serial clock 2

In / Low

B14

LRCK2_GP23

I/O

Audio interfaces word clock 2

In / Low

C11

LINOUT

Linear regulator output

C11

LINOUT

Linear regulator output

B12

LININ

Linear regulator input

B12

LININ

Linear regulator input

P_GND

LIN_GND

Linear regulator ground

C10

SDATAO2_GP34

I/O

Audio interfaces serial data output 2 Out / Low

A12

MCLK1_GP11

I/O

Audio master clock output 1

Out / clock output

---

VBGT

B11

HIZ_B

JTAG

B10

TEST2

Test

TEST1

Test

A11

TEST0

Test

Table 36. 196 MAPBGA Pin Assignments (continued)

MAPBGA

Name

Type

Description

Pin State

After Reset

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SCF5250 数据表(PDF) 49 Page - Freescale Semiconductor, Inc

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