CS43L41 datasheet(13/36 Pages) CIRRUS

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CS43L41

DS473PP1

** “default” ==> bit status after power-up-sequence or reset.

3.1

MCLK Control (address 00h)

MCLKDIV (MCLK Divide-by-2 Enable)

Default = ‘0’.

0 - Disabled

1 - Enabled

3.2

Mode Control (address 01h)

AMUTE (Auto-mute)

Default = ‘1’.

0 - Disabled

1 - Enabled

DIF2, DIF1 and DIF0 (Digital Interface Format)

Default = ‘0’.

0 - Format 0, I2S, up to 24-bit data, 64 x Fs Internal SCLK

1 - Format 1, I2S, up to 24-bit data, 32 x Fs Internal SCLK

2 - Format 2, Left Justified, up to 24-bit data

3 - Format 3, Right Justified, 24-bit Data

4 - Format 4, Right Justified, 20-bit Data

5 - Format 5, Right Justified, 16-bit Data

6 - Format 6, Right Justified, 18-bit Data

7 - Identical to Format 1

DEM 1, DEM 0 (De-Emphasis Mode)

Default = ‘0’.

0 - Disabled

1 - 44.1 kHz De-Emphasis

2 - 48 kHz De-Emphasis

3 - 32 kHz De-Emphasis

POR (Power on/off Quiescent Voltage ramp)

Default = ‘1’.

0 - Disabled

1 - Enabled

PDN (Power-Down)

Default =’1’.

0 - Disabled

1 - Enabled

765

4321

Reserved

MCLKDIV

Reserved

000

0000

765

4321

AMUTE

DIF2

DIF1

DIF0

DEM1

DEM0

POR

PDN

100

0001

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