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CS43L41 数据表(PDF) 20 Page - Cirrus Logic |
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CS43L41 数据表(HTML) 20 Page - Cirrus Logic |
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20 / 36 page ![]() CS43L41 20 DS473PP1 4.10 MUTE Channel A Volume Control Register (address 03h) Channel B Volume Control Register (address 04h) Access: R/W in I2C and write only in SPI. Default: 0 - Disabled Function: The Digital-to-Analog converter output will mute when enabled. The quiescent voltage on the output will be retained. The muting function is effected, similar to attenuation changes, by the Soft and Zero Cross bits in the Volume and Mixing Control register. The MUTEC will go active during the mute pe- riod if the Mute function is enabled for both channels. 1001 0 MUTE bL 1001 1 MUTE [(aL+bR)/2] 1010 0 aR MUTE 1010 1 aR bR 1011 0 aR bL 1011 1 aR [(bL+aR)/2] 1100 0 aL MUTE 1100 1 aL bR 1101 0 aL bL 1101 1 aL [(aL+bR)/2] 1110 0 [(aL+bR)/2] MUTE 1110 1 [(aL+bR)/2] bR 1111 0 [(bL+aR)/2] bL 1111 1 [(aL+bR)/2] [(aL+bR)/2] 765 4321 0 MUTE VOL6 VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 MUTE MODE 0 Disabled 1 Enabled Table 10. Mute Enable ATAPI4 ATAPI3 ATAPI2 ATAPI1 ATAPI0 AOUTA AOUTB Table 9. ATAPI Decode (Continued) |
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