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CS43L41 数据表(PDF) 17 Page - Cirrus Logic |
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CS43L41 数据表(HTML) 17 Page - Cirrus Logic |
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17 / 36 page ![]() CS43L41 DS473PP1 17 4.5 POWER ON/OFF QUIESCENT VOLTAGE RAMP Mode Control Register (address 01h) Access: R/W in I2C and write only in SPI. Default: 1 - Enabled Function: The power On/Off Quiescent Voltage Ramp allows the quiescent voltage to slowly ramp to and from 0 volts to the quiescent voltage during power-on or power-off. Please refer to the applications section for details of implementing this feature. 4.6 POWER DOWN Mode Control Register (address 01h) Access: R/W in I2C and write only in SPI. Default: 1 - Enabled Function: The device will enter a low-power state whenever this function is activated. The power-down bit de- faults to ‘enabled’ on power-up and must be disabled before normal operation will begin. The contents of the control registers are retained in this mode. 765 4321 0 AMUTE DIF2 DIF1 DIF0 DEM1 DEM0 POR PDN POR MODE 0 Disabled 1 Enabled Table 5. Power On/Off Ramp Enable 765 4321 0 AMUTE DIF2 DIF1 DIF0 DEM1 DEM0 POR PDN PDN MODE 0 Disabled 1 Enabled Table 6. Power Down Enable |
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