MAS3690CD datasheet(11/41 Pages) DYNEX

11 / 41 page

MA3690/1/3

11/41

SUBSYSTEM INTERFACE

The terminal / subsystem interface consists of a 16 bit

bidirectional data highway and a number of control lines, many

of which are of optional use. The subsystem lines have been

arranged such as to allow a simple shared store technique to

be readily implemented but sufficient flexibility has been

designed to allow optimisation of the interface for a particular

subsystem design.

REMOTE TERMINAL MODE

On initialisation, the RT address, address parity and

broadcast enables are loaded from the subsystem via the data

highway, Figure 4. The subsystem status bits are also loaded

in a similar manner when required, Figure 5.

This terminal uses two distinct methods for dealing with

non mode data and mode data. In the first, a busy request /

acknowledge handshake is used to ensure no data transfer

takes place when the subsystem is busy thus ensuring no

addressing / data conflict of the main data store. Mode data,

however, may be transferred even if the subsystem has

declared itself busy. This represents a departure from previous

chipset philosophy.

The validation of a data transfer also depends on data type.

For non mode data, a data transfer request / acknowledge

handshake is used to transfer each data word to or from the

subsystem (both RT and BC) with a good block received

(GBRN) denoting a correct transfer. For mode data, a mode

data transfer (MDTN) is used to signal a mode data word with

correct transfer being denoted by mode data received

(MDRN). Thus, dependant on application, the l/O signals may

be significantly reduced.

An RT subsystem interface signal transfer is shown in

Figure 6.

BIT WORD

The terminal contains a 16 regisiter, called BIT word, which

records message errors and terminal status information. The

entire BIT word contents are reset by power up initialisation or

a legal mode command to reset remote terminal.

The

conditions for the setting of the BIT, and any additional reset

conditions are given for each signal.

The contents of the BIT word register shall not be altered

by any of the following legal mode commands.

Transmit

Status Word (TSW), Transmit Last Command (TLC) and

Transmit BIT Word (TBW).

Transmitter Timeout Error

This BIT shall be set to logic one if transmitter timeout

occurs while the terminal is tranmitting.

In addition, if the

terminal is issued with a legal mode command to Initiate Self

Test (code 00011) this bit shall be set if the range transmitter

timeout mechanism does not operate within the of 660

µs to

800

µs.

Subsystem Handshake Failure

This bit shall be set to logic one if the subsystem does not

acknowledge a terminal request to transfer a data word in time

for the transfer to take place correctly.

Loop Test Failure

At all times while the terminal is transmitting the relevant

receiver circuitry checks for an absence of transmission or any

sync, Manchester, parity or contiguity error in the terminals

transmission. This bit shall be set to logic one if any of these

error conditions are detected.

Illegal T/R Bit

This bit shall be reset to logic zero by the reception of any

valid command word with the exception TSW,TLC and TBW.

This bit shall be set to logic one if a valid mode command is

received with a transmit/receive (T/R) bit opposite to that

specified by MIL-STD-1553B.

Illegal Command

This bit shall be reset to logic zero by the reception of any

valid command word with exceptions TSW, TLC and TBW.

This bit shall be set to logic one if any of the following

conditions arise:

(a) The ILLEGAL COMMAND line to the subsystem

status latch is low at the time when INCMD goes

active low.

(b) A valid mode command is received with a reserved

mode code and the ALLOW CODE line to the

subsystem staus latch is high at the time when

INCMD goes low.

received.

15 14 13 12 11 10

TX Timeout Bus 1

TX Timeout Bus 0

Terminal Flag Inhibited

Bus 1 Shutdown

Bus 0 Shutdown

Illegal Broadcast

Word Count High

Word Count Low

Illegal Command

Illegal T/R Bit

Loop Test Failure

SS Handshake Failure

TX Timeout Error

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