MAS3690CD datasheet(3/41 Pages) DYNEX

3 / 41 page

MA3690/1/3

3/41

INCADRN

Output

INCREMENT ADDRESS - This line pulses low to increment

the external instruction addressing counter.

HSFN/IRQN Output

HANDSHAKE FAIL / INTERRUPT REQUEST

RT: This line pulses low to inform the subsystem that it has

not responded to a data transfer request to take place.

BC: This line pulses low to generate an interrupt to the BC

subsystem processor.

INCMDN

Output

IN COMMAND - When low this line indicates that the terminal

is currently servicing a command word.

EOTN

Output

END OF TRANSMISSION - When low this line indicates that

the selected bus is quiet and hence available for use.

ABORTN

Output

This line will pulse low to abort execution of the current

command if an error is detected.

B0-B15

Input/Output

HIGHWAY LINES - 16 line bidirectional Output data highway.

(B0 = LSB).

CLDN

Inter-chip (CMOS)

COMMAND LOAD - When low this line indicates that the

word on the data highway should be loaded into the

transmitter for transmission with a command sync.

DLDN

Inter-chip (CMOS)

DATA LOAD - When low this line indicates that the word on

the data highway should be loaded into the transmitter for

transmission with a data sync.

OBFN

Inter-chip (CMOS)

OUTPUT BUFFER FULL - When low this line indicates that

the transmitter output buffer is full and cannot be overwritten.

VALDRN

Inter-chip (CMOS)

VALID DATA RECEIVED - When low this line indicates that a

valid data word has been received and is on the data

highway.

VALCRN

Inter-chip (CMOS)

VALID COMMAND RECEIVED -

RT: When low this line indicates that a valid command word

for this RT has been received.

BC: When low this line indicates that a valid word with a

command sync has been received.

RT/BCN

Input

REMOTE TERMINAL/BUS CONTROLLER - When high the

terminal will function as an RT.When low the terminal will

function as a bus controller.

CK4

Output

4MHz system clock.

PUCN

Input

POWER UP CLEAR - This line should be pulsed low

following power-up.

RESETN

Input/Output

RESET - This line when low, forces the internal circuitry to

reset to the quiescent initialised state. This is a ‘TTL’ level

input on both devices and an open-drain output on the

MA3690. The subsystem should drive this line via an open

drain/collector device with external pull up fitted.

RT0 / RT1

Inputs

REPLY TIMEOUT DECODE - These lines on the MA3690

allow four different timeout values to be used. On the

MA3693, the RT1 signal is not available and is pulled down

internally.

RT1

RT0

Timeout (us)

108

Note: Under normal operation, option 00 should be used.

(i.e. 16uS)

The measurement is taken between mid parity and mid sync

- measured at PDIN/NDIN terminals.

Output

TERMINAL FLAG - This line is available only on the 64-pin

MA3690 and on the MA3693 (where it replaces RT1). The

line indicates the state of the Terminal Flag bit in the Status

Word, and can be inhibited by the mode code Inhibit

Terminal Flag. This is an active LOW signal.

TEST/SOT

Inputs

These lines are for test purposes only and for normal chip set

operation must both be tied low.

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