13

www.microsemi.com/products/fpga-soc/fpga/fusion

• Integrated A/D converter (ADC)

with 8-, 10- and 12-bit

resolution and 30 scalable

analog input channels

• ADC accuracy better than

1 percent

• On-chip voltage, current and

temperature monitors

• In-system configurable

analog supports a wide

variety of applications

• Up to 1 MB of user flash memory

• Extensive clocking resources

• Analog PLLs

• 1 percent RC oscillator

• Crystal oscillator circuit

• Real-time counter (RTC)

• Instant-on

• Configuration memory error

immune

• Advanced I/O standards

• User nonvolatile FlashROM

Notes:

1. Refer to the Cortex-M1 product brief for more information.

2. Pigeon Point devices only offered in FG484 and FG256 packages.

3. MicroBlade devices only offered in FG256 package.

Notes:

1. Pigeon Point devices only offered in FG484 and FG256 packages.

2. MicroBlade devices only offered in FG256 package.

3. Fusion devices in the same package are pin compatible with the exception of the PQ208 package (AFS250 and AFS600).

Fusion

Package I/Os: Single-/Double-Ended (Analog)

Fusion Devices

AFS090

AFS250

AFS600

AFS1500

ARM Cortex-M1 Devices

M1AFS250

M1AFS600

M1AFS1500

Pigeon Point Devices

MicroBlade Devices

QN108

37/9 (16)

—

—

—

QN180

60/16 (20)

65/15 (24)

—

—

—

93/26 (24)

95/46 (40)

—

FG256

75/22 (20)

114/37 (24)

119/58 (40)

119/58 (40)

FG484

—

—

172/86 (40)

223/109 (40)

FG676

—

—

—

252/126 (40)

Fusion Devices

The world’s first mixed signal FPGA

Fusion FPGAs integrate configurable analog, large flash memory blocks, comprehensive clock generation and management circuitry and high-performance,

flash-based programmable logic in a monolithic device. The Fusion architecture can be used with soft microcontroller cores, such as the performance-optimized

ARM Cortex-M1, 8051s or Microsemi’s own CoreABC, the smallest soft microcontroller for FPGAs.

Fusion Devices

AFS090

AFS250

AFS600

AFS1500

M1AFS250

M1AFS600

M1AFS1500

Pigeon Point Devices

MicroBlade Devices

U1AFS250

U1AFS500

General

Information

System Gates

90,000

250,000

600,000

1,500,000

Tiles (D–flip–flops)

2,304

6,144

13,824

38,400

AES-protected ISP

Yes

Yes

Yes

Yes

PLLs

1

1

2

2

Globals

18

18

18

18

Memory

Flash Memory Blocks (2 Mbits)

1

1

2

4

Total Flash Memory Bits

2,000,000

2,000,000

4,000,000

8,000,000

FlashROM Bits

1,024

1,024

1,024

1,024

RAM Blocks (4,608 bits)

6

8

24

60

RAM (Kbits)

27

36

108

270

Analog and I/Os

Analog Quads

5

6

10

10

Analog Input Channels

15

18

30

30

Gate Driver Outputs

5

6

10

10

I/O Banks (+ JTAG)

4

4

5

5

Maximum Digital I/Os

75

114

172

252

Analog I/Os

20

24

40

40