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M24C08-RMC6TG 数据表(PDF) 17 Page - STMicroelectronics |
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M24C08-RMC6TG 数据表(HTML) 17 Page - STMicroelectronics |
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17 / 38 page  DocID023924 Rev 4 17/38 M24C08-W M24C08-R M24C08-F Instructions 37 5.1.3 Minimizing Write delays by polling on ACK The maximum Write time (tw) is shown in AC characteristics tables in Section 8: DC and AC parameters, but the typical time is shorter. To make use of this, a polling sequence can be used by the bus master. The sequence, as shown in Figure 9, is: • Initial condition: a Write cycle is in progress. • Step 1: the bus master issues a Start condition followed by a device select code (the first byte of the new instruction). • Step 2: if the device is busy with the internal Write cycle, no Ack will be returned and the bus master goes back to Step 1. If the device has terminated the internal Write cycle, it responds with an Ack, indicating that the device is ready to receive the second part of the instruction (the first byte of this instruction having been sent during Step 1). Figure 9. Write cycle polling flowchart using ACK |
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