DC and AC parameters

M24C08-W M24C08-R M24C08-F

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DocID023924 Rev 4

application. Note that the M24xxx devices decode correctly faster timings as specified in Table 16: 400 kHz

AC characteristics.

Symbol

Alt.

Parameter

Min.

Max.

Unit

Clock frequency

-

100

kHz

Clock pulse width high

4

-

µs

Clock pulse width low

4.7

-

µs

Input signal rise time

-

1

µs

Input signal fall time

-

300

ns

2. Characterized only.

SDA fall time

-

300

ns

250

-

ns

0

-

ns

3. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or

rising edge of SDA.

Data out hold time

200

-

ns

Clock low to next data valid (access time)

-

3450

ns

5. For a reStart condition, or following a Write cycle.

4.7

-

µs

4

-

µs

4

-

µs

Time between Stop condition and next Start

condition

4.7

-

µs

Write time

-

5

ms

tNS(2)

Pulse width ignored (input filter on SCL and

SDA), single glitch

-

100

ns