STMPE1801 datasheet(14/60 Pages) STMICROELECTRONICS

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I2C specification

STMPE1801

14/60

Doc ID 17884 Rev 3

I2C specification

The features supported by the I2C interface are listed below:

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I2C slave device

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Operates at VCC (1.8 - 3.6 V)

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Compliant to Philips I2C specification version 2.1

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Supports standard (up to 100 kbps) and fast (up to 400 kbps) modes

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7-bit device addressing modes

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General call

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Start/Restart/Stop

6.1

I2C related pins

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SCL

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SDA

The device supports both 1.8 V I2C and 3.3 V I2C operations. It is recommended that

Vpullup at SCL and SDA externally is greater or equal to VCC.

6.2

I2C addressing

The STMPE1801 7-bit addressing is set to 40h.

6.3

Start condition

A Start condition is identified by a falling edge of SDA while SCL is stable at high state. A

Start condition must precede any data/command transfer. The device continuously monitors

for a Start condition and does not respond to any transaction unless one is encountered.

The first byte is scanned after the START command is detected to check for device ID.

Ensure that all state machines are flushed when START instruction is issued.

6.4

Stop condition

A Stop condition is identified by a rising edge of SDA while SCL is stable at high state. A

Stop condition terminates the communication between the slave device and bus master. A

read command that is followed by NoAck can be followed by a Stop condition to force the

slave device into idle mode. When the slave device is in idle mode, it is ready to receive the

next I2C transaction. A Stop condition at the end of a write command stops the write

operation to the registers.

Once the Stop condition is detected, the device should release the bus and go to Hibernate

mode if there is no more activity.

An I2C transaction with a START bit followed immediately by a STOP condition should not

cause any I2C lock-up.

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