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STMPE1801 数据表(PDF) 29 Page - STMicroelectronics |
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STMPE1801 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 60 page  STMPE1801 Interrupt system Doc ID 17884 Rev 3 29/60 INT_EN_GPIO_MASK Interrupt enabled GPIO mask register Address: 0A, 0B, 0C Type: R/W Reset: 0x00 Description: The interrupt enable GPIO mask register is used to enable the interruption from a particular GPIO interrupt source to the host. The IEG[17:0] bits are the interrupt enable mask bits correspond to the GPIO[17:0] pins. 76 5 4 3 2 1 0 INT_EN_GPIO_MASK_LOW IEG7 IEG6 IEG5 IEG4 IEG3 IEG2 IEG1 IEG0 RW RW RW RW RW RW RW RW 00 0 0 0 0 0 0 15 14 13 12 11 10 9 8 INT_EN_GPIO_MASK_MID IEG15 IEG14 IEG13 IEG12 IEG11 IEG10 IEG9 IEG8 RW RW RW RW RW RW RW RW 00 0 0 0 0 0 0 23 22 21 20 19 18 17 16 INT_EN_GPIO_MASK_HIGH Reserved IEG17 IEG16 R R R R R R RW RW 00 0 0 0 0 0 0 [17:0 IEG[x]: Interrupt enable GPIO mask (where x = 17 to 0) Writing a ‘1’ to the IEG[x] bit enables the interruption to the host. |
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