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ICS1531 数据表(PDF) 63 Page - Integrated Circuit Systems |
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ICS1531 数据表(HTML) 63 Page - Integrated Circuit Systems |
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63 / 76 page  Chapter 10 Timing Diagrams ICS1531 Rev N 12/1/99 December, 1999 63 Copyright © 1999, Integrated Circuit Systems, Inc. All rights reserved. ICS1531 Data Sheet - Preliminary Chapter 10 Timing Diagrams 10.1 Industry-Standard 2-Wire Serial Bus Timing Diagrams 10.1.1 Start and Stop Conditions Figure 10-1 shows in general terms how start and stop conditions work when transferring bits on an industry-standard 2-wire serial bus. All bus transactions begin with a start and end with a stop. • To start a bus transfer (1), the clock signal from a master device (typically a microcontroller) is allowed to float high while the data signal driven by the master device transitions from high to low. • The bytes transfer (2) from the master device to/from the ICS1531. (For details, see Section 10.1.2, “Transfer of Data Bytes”.) • To stop a bus transfer (3), while the clock signal is high, the data signal transitions from low to high. Figure 10-1. Start and Stop Conditions Star Stop Byte Transfer Clock from Master Device Data Signal (1) (3) (2) |
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