80960KB

38

5.0

REVISION HISTORY

No revision history was maintained in earlier revisions of this data sheet. All errata that has been identified to

date is incorporated into this revision. The sections significantly changed since the previous revision are:

Section

Last

Rev.

Description

Table 4. 80960KB Pin Description:

L-Bus Signals (pg. 8)

-005

LOCK pin description rewritten for clarity.

2.3. Connection Recommenda-

tions (pg. 11)

-005

Changed suggested open-drain termination networks to

reflect more realistic operating conditions with reduction in

DC power consumption.

Figure 9. Typical Current vs. Fre-

quency (Hot Temp) (pg. 13)

-005

Added figure for typical power supply current at hot tempera-

ture to aid thermal analysis.

Figure 12. Test Load Circuit for

Three-State Output Pins (pg. 14)

Figure 13. Test Load Circuit for

Open-Drain Output Pins (pg. 14)

-005

All outputs now specified with standard 50 pF test loads to

agree with actual test methodology.

2.7. DC Characteristics (pg. 15)

-005

ICC max specification reduced:

WAS:

IS:

AT:

375 mA

315 mA

16 MHz

420 mA

360 mA

20 MHz

480 mA

420 mA

25 MHz

Figures 7, 8, 9, 23, 24, 25 and 26 have also been changed

accordingly.

2.8. AC Specifications (pg. 16)

-005

max. improved from 20 ns to 18 ns.

WAS:

IS:

AT:

31ns

28ns

16 MHz

26ns

23ns

20 MHz

24ns

23ns

25 MHz

Functional Waveforms

-005

Redrawn for clarity. CLK signal drawn with more likely phase

relationship to CLK2. Open-drain output signals drawn to

show correct inactive states.

Various

-005

Deleted all references to 10 MHz. Intel no longer offers a

10 MHz 80960KB device.