Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent

licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel.

May 1993

© INTEL CORPORATION, 1993

Order Number: 270565-006

80960KB

EMBEDDED 32-BIT MICROPROCESSOR

WITH INTEGRATED FLOATING-POINT UNIT

The 80960KB is a member of Intel’s i960® 32-bit processor family, which is designed especially for embedded

applications. It includes a 512-byte instruction cache, an integrated floating-point unit and a built-in interrupt

controller. The 80960KB has a large register set, multiple parallel execution units and a high-bandwidth burst

bus. Using advanced RISC technology, this high performance processor is capable of execution rates in excess

impact printers, I/O control and specialty instrumentation.

Figure 1. The 80960KB Processor’s Highly Parallel Architecture

* Relative to Digital Equipment Corporation’s VAX-11/780 at 1 MIPS (VAX-11™ is a trademark of Digital Equipment

Corporation)

s High-Performance Embedded Architecture

— 25 MIPS Burst Execution at 25 MHz

— 9.4 MIPS* Sustained Execution at 25 MHz

s 512-Byte On-Chip Instruction Cache

— Direct Mapped

— Parallel Load/Decode for Uncached Instruc-

tions

s Multiple Register Sets

— Sixteen Global 32-Bit Registers

— Sixteen Local 32-Bit Registers

— Four Local Register Sets Stored On-Chip

— Register Scoreboarding

s 4 Gigabyte, Linear Address Space

s Pin Compatible with 80960KA

s Built-in Interrupt Controller

— 31 Priority Levels, 256 Vectors

— 3.4 µs Latency @ 25 MHz

s Easy to Use, High Bandwidth 32-Bit Bus

— 66.7 Mbytes/s Burst

— Up to 16 Bytes Transferred per Burst

s 132-Lead Packages:

— Pin Grid Array (PGA)

— Plastic Quad Flat-Pack (PQFP)

s On-Chip Floating Point Unit

— Supports IEEE 754 Floating Point Standard

— Four 80-Bit Registers

— 13.6 Million Whetstones/s (Single

Precision) at 25 MHz

SIXTEEN

32-BIT GLOBAL

REGISTERS

64- BY 32-BIT

LOCAL

REGISTER

CACHE

32-BIT

INSTRUCTION

EXECUTION

UNIT

INSTRUCTION

FETCH UNIT

512-BYTE

INSTRUCTION

CACHE

INSTRUCTION

DECODER

MICRO-

INSTRUCTION

SEQUENCER

MICRO-

INSTRUCTION

ROM

32-BIT

BUS

CONTROL

LOGIC

32-BIT

BURST

BUS

FOUR

80-BIT FP

REGISTERS

80-BIT

FPU