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LCL8052ACPD 数据表(PDF) 8 Page - Intersil Corporation

部件名 LCL8052ACPD
功能描述  14-Bit/16-Bit, Microprocessor- Compatible, 2-Chip, A/D Converter
PDF  21 Pages
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

LCL8052ACPD 数据表(HTML) 8 Page - Intersil Corporation

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5-13
System Electrical Specifications: ICL8068/ICL7104 V++ = +15V, V+ = +5V, V- = -15V, fCLOCK = 200kHz (Note 16)
PARAMETER
TEST
CONDITIONS
ICL8068A/ICL7104-14
ICL8068A/ICL7104-16
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Zero Input Reading
VIN = 0V, VREF = 2V
-00000
±00000 +00000 -00000 ±00000 +00000 Counts
Ratiometric Error (Note 13)
VIN = VREF = 2V
-1
0
1
-1
0
1
LSB
Linearity Over
± Full Scale (Error of
Reading from Best Straight Line)
-4V
≤ VIN ≤ +4V
-
0.5
1
-
0.5
1
LSB
Differential Linearity (Difference
between Worst Case Step of Adjacent
Counts and Ideal Step)
-4V
≤ VIN ≤ +4V
-
0.01
-
-
0.01
-
LSB
Rollover Error (Difference in Reading
for Equal Positive & Negative Voltage
Near Full Scale)
-VIN = +VIN ≅ 4V
-
0.5
1
-
0.5
1
LSB
Noise (P-P Value Not Exceeded 95%
of Time)
VIN = 0V,
Full Scale = 4V
-2-
-
2-
µV
Leakage Current at Input (Note 14)
VIN = 0V
-
100
165
-
100
165
pA
Zero Reading Drift
VIN = 0V,
0oC to 70oC
-
0.5
-
-
0.5
-
µV/oC
Scale Factor Temperature Coefficient
(Note 15)
VIN = 4V,
0oC to 50oC
ext. ref. 0ppm/oC
-
2
5
-
2
5
ppm/oC
System Electrical Specifications: ICL8052/ICL7104 V++ = +15V, V+ = +5V, V- = -15V, fCLOCK = 200kHz (Note 16)
PARAMETER
TEST
CONDITIONS
ICL8052A/ICL7104-14
ICL8052A/ICL7104-16
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Zero Input Reading
VIN = 0V, VREF = 2V
-00000
±00000 +00000 -00000 ±00000 +00000 Counts
Ratiometric Error (Note 15)
VIN = VREF = 2V
-1
0
1
-1
0
1
LSB
Linearity Over
± Full Scale (Error of
Reading from Best Straight Line)
-4V
≤ VIN ≤ +4V
-
0.5
1
-
0.5
1
LSB
Differential Linearity (Difference
between Worst Case Step of Adjacent
Counts and Ideal Step)
-4V
≤ VIN ≤ +4V
-
0.01
-
-
0.01
-
LSB
Rollover Error (Difference in Reading
for Equal Positive and Negative
Voltage Near Full Scale)
-VIN = +VIN ≈ 4V
-
0.5
1
-
0.5
1
LSB
Noise (Peak-to-Peak Value Not
Exceeded 95% of Time)
VIN = 0V,
Full Scale = 4V
-30-
-30-
µV
Leakage Current at Input (Note 14)
VIN = 0V
-
20
30
-
20
30
pA
Zero Reading Drift
VIN = 0V,
0oC to 70oC
-
0.5
-
-
0.5
-
µV/oC
Scale Factor Temperature Coefficient
VIN = 4V,
0oC to 50oC
ext. ref. 0ppm/oC
-
2
-
-
2
-
ppm/oC
NOTES:
13. Tested with low dielectric absorption integrating capacitor.
14. The input bias currents are junction leakage currents which approximately double for every 10oC increase in the junction temperature,
TJ. Due to limited production test time, the input bias currents are measured with junctions at ambient temperature. In normal oper-
ation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. TJ = TA + RθJAPD
where RθJA is the thermal resistance from junction to ambient. A heat sink can be used to reduce temperature rise.
15. The temperature range can be extended to 70oC and beyond if the Auto-Zero and Reference capacitors are increased to absorb the
high temperature leakage of the 8068. See note 14 above.
16. System Electrical Specifications are not tested; for reference only.
ICL8052/ICL7104, ICL8068/ICL7104



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