AN4035 datasheet(31/42 Pages) STMICROELECTRONICS

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AN4035

Nexus Read/Write access block

Doc ID 022669 Rev 2

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Table 7.

JTAG Data Register (DR)

The second pass through the DR then shifts the data in or out depending on the type of

access LSB first.

During a read access, the data is latched from the Nexus register when the TAP

controller state machine passes through the CAPTURE-DR state. The data from

the Nexus register can be read by the external tool by shifting the data out in the

SHIFT-DR state. The last bit is shifted out with TMS set to 1, causing transition to

the EXIT1-DR state.

During a write access, the data is shifted in while in the SHIFT-DR state. The last

bit is shifted in with TMS set to 1, causing transition to the EXIT1-DR state. The

data is latched into the Nexus register when the TAP controller state machine

passes through the UPDATE-DR state.

Table 8.

Nexus register index

Value shown at bottom of register description

Read/Write (R/W)

0 Read

1 Write

(7-bits)

(1-bit)

Nexus Register Index

R/W

RESET Value: 0x00

AN4035 数据表(PDF) 31 Page - STMicroelectronics