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AN413 数据表(PDF) 9 Page - STMicroelectronics |
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AN413 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 45 page ![]() AN413 ST9 basic system configuration Doc ID 1875 Rev 2 9/45 Example: F5 F5 1B ld T_OACR,#00011011b In this example T0OUTA is preset to 1, and is subsequently set by COMP0, toggled by COMP1, and Reset by OVF. The OCE signal is generated by a successful CMP0 compare event. The Output Control Register, OBCR, links the output T0OUTB to counter overflow/underflow and Compare events, and provides for subsequent Set, Reset, or Toggle of the external output. The on-chip event (OCE) may be linked to a counter overflow/underflow event. Example: F5 F6 83 ld T_OBCR,#10000011b In this example T0OUTB is preset to 1, and is subsequently reset by COMP0, and set by OVF and COMP1. The OCE signal is generated by a counter overflow/underflow event. 3.4 Multifunction timer initialization Initialization of the Multifunction Timer requires loading of the Prescaler register and the two Comparison registers. The timer Status register should be cleared, the Vector Table entry should be set, and the Multifunction Timer counter actions enabled. The interrupt/DMA priority levels should be set and the mask bits should be adjusted as appropriate to the application. Further, if DMA operations are specified, DMA address and counter registers will require initialization. The Prescaler Register, PRSR, holds the preset value for the 8-bit prescaler. Example: BC 00 ld T_PRSR,#00h This defines a division ratio of 1 and the maximum counter clock is generated (INTCLK/3). The Multifunction Timer Flags Register, FLAGR, contains flags which register successful capture or comparison events together with OVF/UNF and overrun conditions. Example: 15 FE FD and T_FLAGR,#~ocm0 This example resets the overrun bit for COMP0 operations. The Interrupt Vector Register, IVR, should be loaded with the 5 most significant bits of the Multifunction Timer’s interrupt vector address in program memory. The interrupt source (compare, capture, or OVF/UNF) provides the least significant 3 bits to provide the correct vector link. Example: F5 F2 10 ld T0_IVR,#T0_IT_VECT In this example IVR is loaded with the start address (10h) of the block of 8 words in the vector table allocated to the 5 different Multifunction Timer interrupts. |
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