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ST7 AND ST9 PERFORMANCE BENCHMARKING

7.2 REMARKS ON SOME PARAMETERS

7.2.1 Instruction processing

Only two different instruction processings exist:

• standard processing: current instruction is completely processed before next one is fetched

• prefetch mechanism: some next opcodes are prefetched as current instruction is processed

The prefetch mechanism is best described as a queue rather than as a pipeline. Queue

logic fetches program information and positions it for execution, but instructions are executed

sequentially. A typical pipelined CPU executes more than one instruction at the same time.

The queue size is given, but performance is not precised because no value is given by

databooks. Nevertheless, general statistics on instruction processing mechanisms give an

usual average 20%-25% gain for one stage, and this gain is not more than 25%-30% for two

stages. Additional stages without complex mechanisms do not give higher gain. Anyway, the

instruction processing mechanism has a leading role in general performance.

7.2.2 Average ICT/CPI and IL

The average ICT (Instruction Cycle Time) is a currently used parameter. But it is linked to the

frequency f, then we prefer the average CPI (Clock Per Instruction) to describe the

instruction set. On the other hand, to compare MCU core performance, the frequency has

to be considered, and so the average ICT is used in result analysis (section 4). Charts with

ICT and IL ranges are presented at the end of this section (see <Italic>7.4 Instruction Cycle

Time chart<Italic end> and <Italic>7.5 Instruction Length chart<Italic end>).

Remark that the average ICT (in µs) is the inverse of the MIPS parameter (Million Instruction

Per Second), and so we have the formula:

(f is in MHz and ICT is in µs)

The average ICT/CPI and average IL have been calculated considering all available

instructions and all possible addressing modes, favouring mostly used ones in the test

routines. Ranges are presented instead of decimal values, to take the subjectivity of the

calculation into account. Thus the values can be considered as reliable.

MIPS =

CPI

ICT

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