UPD6708 datasheet(23/72 Pages) NEC

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µPD6708

4.1.4

Status register (STR)

STR is an 8-bit register used to determine the status of the

µPD6708.

The statuses of WDB and RDB and the status of interrupts can be read from higher 4 bits. The return code, which indicates

the result of the communication, can be read from lower 4 bits.

Table 4-2. Contents of Status Register

Bit

Value

Meaning

Description

Bit 7

WDB is full

Indicates whether data can be written to WDB

WDB is not full

Bit 6

RDB is empty

Indicates whether data can be read from RDB

RDB is not empty

Bit 5

WDB is empty

Indicates whether data is in WDB

WDB is not empty

Bit 4

Interrupt requested

Indicates whether interrupt servicing is being requested (Bit 4 of the status

Interrupt not requested

Bit 3 to

Return code

Return code will be read

Bit 0

4.2

Host Interface Modes

The host controller can access WDB, RDB, CMR, and STR within the

µPD6708 via the serial interface (SCK, SI, SO).

There are four modes for accessing the serial interface, as shown in the Table 4-3.

There are two method for switching among these four host interface modes: by using C/D pin and R/W pin, and by writing

data to CMR (software control).

Table 4-3. Host Interface Mode

Mode

Operation

Data write mode

Data input to SI pin is written to WDB from MSB at the rising edge of the serial clock input to SCK pin.

Data setting is completed at the eighth serial clock cycle.

Data read mode

RDB data is output from MSB to SO pin at the falling edge of the serial clock input to SCK pin. A data

read is completed by inputting eight serial clock cycles. Data at SI pin is ignored.

Command write mode

Data input to SI pin is written to CMR from MSB at rising edge of the serial clock input to SCK pin. Data

setting is completed at the eight serial clock cycle.

Status read mode

STR data is output from MSB to SO pin at the falling edge of the serial clock input to SCK pin. A data

read is completed by inputting eight serial clock cycles. Data at SI pin is ignored.

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