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PM0068 数据表(PDF) 25 Page - STMicroelectronics |
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PM0068 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 31 page ![]() PM0068 Register descriptions Doc ID 17100 Rev 2 25/31 3.8 Write protection register (FLASH_WRPR) Address offset: 0x20 Reset value: 0xFFFF FFFF 3.9 FPEC key register2 (FLASH_KEYR2) This register is dedicated to Flash memory bank 2. Address offset: 0x44 Reset value: xxxx xxxx Note: These bits are all write-only and will return a 0 when read. Bits 9:2 USER: User option bytes This contains the user option byte loaded by the OBL. Bits [9:6]: Not used (if these bits are written in the Flash option byte, they will be read in this register with no effect on the device.) Bit 5: BFB2 Bit 4: nRST_STDBY Bit 3: nRST_STOP Bit 2: WDG_SW Bit 1 RDPRT: Read protection When set, this indicates that the Flash memory is read-protected. Note: This bit is read-only. Bit 0 OPTERR: Option byte error When set, this indicates that the loaded option byte and its complement do not match. The corresponding byte and its complement are read as 0xFF in the FLASH_OBR or FLASH_WRPR register. Note: This bit is read-only. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 WRP[31:16] rr rr rr r r rr rr rr r r 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 WRP[15:0] rr rr rr r r rr rr rr r r Bits 31:0 WRP: Write protect This register contains the write-protection option bytes loaded by the OBL. 0: Write protection active 1: Write protection not active Note: These bits are read-only. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 FKEYR[31:16] wwww ww w w w w w w w w w w 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FKEYR[15:0] wwww ww w w w w w w w w w w |
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