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LTC1419ACSW 数据表(PDF) 2 Page - Linear Technology |
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LTC1419ACSW 数据表(HTML) 2 Page - Linear Technology |
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2 / 20 page  2 LTC1419 AVDD = VDD = DVDD (Notes 1, 2) Supply Voltage (VDD) ................................................ 6V Negative Supply Voltage (VSS)................................ – 6V Total Supply Voltage (VDD to VSS) .......................... 12V Analog Input Voltage (Note 3) ......................................... (VSS – 0.3V) to (VDD + 0.3V) Digital Input Voltage (Note 4) ......... (VSS – 0.3V) to 10V Digital Output Voltage ........ (VSS – 0.3V) to (VDD + 0.3V) Power Dissipation ............................................. 500mW Operating Temperature Range LTC1419C............................................... 0 °C to 70°C LTC1419I ........................................... – 40 °C to 85°C Storage Temperature Range ................ – 65 °C to 150°C Lead Temperature (Soldering, 10 sec)................. 300 °C A G A U A R BSOLUTEXI TI S PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER CC HARA TERISTICS CO VERTER With Internal Reference (Notes 5, 6) Consult factory for Military grade parts. TJMAX = 110°C, θJA = 95°C/W (G) TJMAX = 110°C, θJA = 130°C/W (SW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 +AIN –AIN VREF REFCOMP AGND D13(MSB) D12 D11 D10 D9 D8 D7 D6 DGND AVDD DVDD VSS BUSY CS CONVST RD SHDN D0 D1 D2 D3 D4 D5 SW PACKAGE 28-LEAD PLASTIC SO WIDE G PACKAGE 28-LEAD PLASTIC SSOP TOP VIEW LTC1419ACG LTC1419ACSW LTC1419AIG LTC1419AISW LTC1419CG LTC1419CSW LTC1419IG LTC1419ISW LTC1419 LTC1419A PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Resolution (No Missing Codes) q 13 14 Bits Integral Linearity Error (Note 7) q ±0.8 ±2 ±0.6 ±1.25 LSB Differential Linearity Error q ±0.7 ±1.5 ±0.5 ±1 LSB Offset Error (Note 8) q ±5 ±20 ±5 ±20 LSB Full-Scale Error Internal Reference ±10 ±60 ±10 ±60 LSB External Reference = 2.5V ±5 ±5 LSB Full-Scale Tempco IOUT(REF) = 0 ±15 ±15 ppm/ °C SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Analog Input Range (Note 9) 4.75V ≤ VDD ≤ 5.25V, –5.25 ≤ VSS ≤ –4.75V q ±2.5 V IIN Analog Input Leakage Current CS = High q ±1 µA CIN Analog Input Capacitance Between Conversions 15 pF During Conversions 5 pF tACQ Sample-and-Hold Acquisition Time q 90 300 ns tAP Sample-and-Hold Aperture Delay Time –1.5 ns tjitter Sample-and-Hold Aperture Delay Time Jitter 2 psRMS CMRR Analog Input Common Mode Rejection Ratio – 2.5V < (– AIN = AIN) < 2.5V 60 dB PUT I A A LOG (Note 5) |
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