数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

LTC1419ACSW 数据表(PDF) 6 Page - Linear Technology

部件名 LTC1419ACSW
功能描述  14-Bit, 800ksps Sampling A/D Converter with Shutdown
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC1419ACSW 数据表(HTML) 6 Page - Linear Technology

Back Button LTC1419ACSW Datasheet HTML 2Page - Linear Technology LTC1419ACSW Datasheet HTML 3Page - Linear Technology LTC1419ACSW Datasheet HTML 4Page - Linear Technology LTC1419ACSW Datasheet HTML 5Page - Linear Technology LTC1419ACSW Datasheet HTML 6Page - Linear Technology LTC1419ACSW Datasheet HTML 7Page - Linear Technology LTC1419ACSW Datasheet HTML 8Page - Linear Technology LTC1419ACSW Datasheet HTML 9Page - Linear Technology LTC1419ACSW Datasheet HTML 10Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 20 page
background image
6
LTC1419
PI FU CTIO S
CONVST (Pin 23): Conversion Start Signal. This active
low signal starts a conversion on its falling edge.
CS (Pin 24): Chip Select. The input must be low for the
ADC to recognize CONVST and RD inputs. CS also sets
the shutdown mode when SHDN goes low. CS and
SHDN low select the quick wake-up nap mode. CS high
and SHDN low select sleep mode.
BUSY (Pin 25): The BUSY output shows the converter
status. It is low when a conversion is in progress. Data
valid on the rising edge of BUSY.
VSS (Pin 26): –5V Negative Supply. Bypass to AGND
with 10
µF tantalum in parallel with 0.1µF or 10µF
ceramic.
DVDD (Pin 27): 5V Positive Supply. Short to Pin 28.
AVDD (Pin 28): 5V Positive Supply. Bypass to AGND
with 10
µF tantalum in parallel with 0.1µF or 10µF
ceramic.
+AIN (Pin 1): ±2.5V Positive Analog Input.
–AIN (Pin 2): ±2.5V Negative Analog Input.
VREF (Pin 3): 2.5V Reference Output. Bypass to AGND
with 1
µF.
REFCOMP (Pin 4): 4.06V Reference Output. Bypass to
AGND with 10
µF tantalum in parallel with 0.1µF or 10µF
ceramic.
AGND (Pin 5): Analog Ground.
D13 to D6 (Pins 6 to 13): Three-State Data Outputs.
DGND (Pin 14): Digital Ground for Internal Logic. Tie to
AGND.
D5 to D0 (Pins 15 to 20): Three-State Data Outputs.
SHDN (Pin 21): Power Shutdown Input. Low selects
shutdown. Shutdown mode selected by CS. CS = 0 for
nap mode and CS = 1 for sleep mode.
RD (Pin 22): Read Input. This enables the output
drivers when CS is low.
14-BIT CAPACITIVE DAC
COMP
REF AMP
2.5V REF
2k
REFCOMP
(4.06V)
CSAMPLE
CSAMPLE
•
•
•
D13
D0
BUSY
CONTROL LOGIC
CS
CONVST
RD
SHDN
INTERNAL
CLOCK
ZEROING SWITCHES
DVDD
VSS
AVDD
+AIN
–AIN
VREF
AGND
DGND
14
1419 BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
FU CTIO AL BLOCK DIAGRA



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com