to other MAX500s poses no problem. If SRO is used to

drive a TTL-compatible input, use a clamp diode

resistor to prevent potential latchup problems with

the 5V supply.

Table 2 shows the truth table for SDA, SCL,

LOAD, and

LDAC operation. Figures 5 and 6 show the timing dia-

grams for the MAX500.

__________Applications Information

Power-Supply and Reference

Operating Ranges

between +12V ±5% and +15V ±10% (+11.4V to

mance is also guaranteed for single-supply operation

For an adequate DAC and buffer operating range, the

The MAX500 is specified to operate with a reference

Ground Management

Digital or AC transient signals between AGND and

DGND will create noise at the analog outputs. It is rec-

ommended that AGND and DGND be tied together at

the DAC and that this point be tied to the highest quali-

ty ground available. If separate ground buses are used,

then two clamp diodes (1N914 or equivalent) should be

connected between AGND and DGND to keep the two

ground buses within one diode drop of each other. To

avoid parasitic device turn-on, AGND must not be

allowed to be more negative than DGND. DGND should

be used as supply ground for bypassing purposes.

CMOS, Quad, Serial-Interface

8-Bit DAC

_______________________________________________________________________________________

9

Figure 7. Suggested MAX500 PC Board Layout for

Minimizing Crosstalk

Figure 8. MAX500 Unipolar Output Circuit

COMPONENT SIDE (TOP VIEW)

SYSTEM GND

AGND

DGND

DAC A

DAC B

DAC C

DAC D

MAX500

DIGITAL

INPUTS

NOT

SHOWN

REFERENCE INPUTS

2

1

16

15

+15V

13

12

414

3

-5V (OR GND)

56

AGND

DGND

DAC

OUTPUT

FROM MAX500

R1

R2

+15V

-15V

R1 = R2 = 10k

Ω ±0.1%

Figure 9. Bipolar Output Circuit