UTDA8024

Preliminary

LINEAR INTEGRATED CIRCUIT

UNISONICTECHNOLOGIESCO.,LTD

3 of 15

www.unisonic.com.tw

QW-R113-014.a



PIN DESCRIPTION

PIN NO.

PIN NAME

DESCRIPTION

1

CLKDIV1

CLK frequency selection input 1

2

CLKDIV2

CLK frequency selection input 2

3

5V/ V

3

4

PGND

DC/DC converter power supply ground

5

S2

DC/DC converter capacitor; connected between pins S1 and S2; C=100nF with

ESR<100mΩ

6

DC/DC converter power supply voltage

7

S1

DC/DC converter capacitor; connected between pins S1 and S2; C=100nF with

ESR<100mΩ

8

DC/DC converter output decoupling capacitor connection; C=100nF with ESR<100mW

must be connected between VUP and PGND

9

PRES

Card presence contact input (active LOW); if PRES or PRES is active, the card is

considered ‘present’ and a built-in debounce feature of 8 ms (typ.) is activated

10

PRES

Card presence contact input (active HIGH); if PRES or PRES is active, the card is

considered ‘present’ and a built-in debounce feature of 8 ms (typ.) is activated

11

I/O

12

AUX2

13

AUX1

14

CGND

Card signal ground

15

CLK

Card clock to/from card reader contact C3

16

RST

Card reset output from card reader contact C2

17

Card supply voltage to card reader contact C1; decoupled to CGND via 2 × 100nF or

100+220nF capacitors with ESR<100mΩ; Note 1

18

PORADJ

Power-on reset threshold adjustment input for changing the reset threshold with an

external resistor bridge; doubles the width of the POR pulse when used

19

CMDVCC

Input from the host to start activation sequence (active LOW)

20

RSTIN

Card reset input from the host

21

Supply voltage

22

GND

Ground

23

OFF

24

XTAL1

Crystal connection or input for external clock

25

XTAL2

Crystal connection (leave open-circuit if external clock source is used)

26

I/OUC

27

AUX1UC

28

AUX2UC