UTDA8024 datasheet(10/15 Pages) UTC

10 / 15 page

UTDA8024

Preliminary

LINEAR INTEGRATED CIRCUIT

UNISONICTECHNOLOGIESCO.,LTD

10 of 15

www.unisonic.com.tw

QW-R113-014.a



ELECTRICAL CHARACTERISTICS (Cont.)

Notes: 1. All parameters remain within limits but are tested only statistically for the temperature range. When a

parameter is speciﬁed as a function of VDD or VCC it means their actual value at the moment of

measurement.

2. If no external bridge is used then, to avoid any disturbance, it is recommended to connect pin 18 to

ground.

3. To meet these specifications, pin VCC should be decoupled to CGND using two ceramic multilayer

capacitors of low ESR both with values of 100nF, or one 100nF and one 220nF (see Fig. 6)

4. Permitted capacitor values are 100, or 100 + 100, or 220, or 220 + 100, or 330nF.

5. Transition time and duty factor definitions are shown in Fig.5,

6. Pin CMDVCC is active LOW; pin RSTIN is active HIGH; for CLKDIV1 and CLKDIV2 functions see Table

7. Pin PRES is active LOW; pin PRES is active HIGH; PRES has an integrated 1.25µA current source to

GND (PRES to VDD); the card is considered present if at least one of the inputs PRES or PRES is active.

Table 1 Clock frequency selection (Note)

CLKDIV1

CLKDIV2

fCLK

fXTAL

Note: The status of pins CLKDIV1 and CLKDIV2must not be changed simultaneously; a delay of 10ns minimum

between changes is needed; the minimum duration of any state of CLK is eight periods of XTAL1.

UTDA8024 数据表(PDF) 10 Page - Unisonic Technologies