MMDF2C01HD datasheet(9/16 Pages) ONSEMI

9 / 16 page

MMDF2C01HD

http://onsemi.com

t, TIME

Figure 11. Reverse Recovery Time (trr)

di/dt = 300 A/

µs

Standard Cell Density

High Cell Density

trr

SAFE OPERATING AREA

The Forward Biased Safe Operating Area curves define

the maximum simultaneous drain−to−source voltage and

drain current that a transistor can handle safely when it is

forward biased. Curves are based upon maximum peak

junction temperature and a case temperature (TC) of 25°C.

Peak repetitive pulsed power limits are determined by using

the thermal response data in conjunction with the procedures

discussed in AN569, “Transient Thermal Resistance −

General Data and Its Use.”

Switching between the off−state and the on−state may

traverse any load line provided neither rated peak current

(IDM) nor rated voltage (VDSS) is exceeded, and that the

transition time (tr, tf) does not exceed 10 µs. In addition the

total power averaged over a complete switching cycle must

not exceed (TJ(MAX) − TC)/(RθJC).

A power MOSFET designated E−FET can be safely used

in switching circuits with unclamped inductive loads. For

reliable operation, the stored energy from circuit inductance

dissipated in the transistor while in avalanche must be less

than the rated limit and must be adjusted for operating

conditions differing from those specified. Although industry

practice is to rate in terms of energy, avalanche energy

capability is not a constant. The energy rating decreases

non−linearly with an increase of peak current in avalanche

and peak junction temperature.

Figure 12. Maximum Rated Forward Biased

Safe Operating Area

Figure 12. Maximum Rated Forward Biased

Safe Operating Area

0.1

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

RDS(on) LIMIT

THERMAL LIMIT

PACKAGE LIMIT

0.01

VGS = 8 V

SINGLE PULSE

TC = 25°C

0.1

10 ms

100

Mounted on 2

″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″

thick single sided) with one die operating, 10s max.

1 ms

0.1

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

RDS(on) LIMIT

THERMAL LIMIT

PACKAGE LIMIT

0.01

VGS = 20 V

SINGLE PULSE

TC = 25°C

0.1

10 ms

100

Mounted on 2

″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″

thick single sided) with one die operating, 10s max.

1 ms

100

µs

N−Channel

P−Channel

MMDF2C01HD 数据表(PDF) 9 Page - ON Semiconductor

MMDF2C01HD 数据表(HTML) 9 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

数据表下载