ADP2389/ADP2390

Data Sheet

THEORY OF OPERATION

The ADP2389/ADP2390 are synchronous step-down, dc-to-dc

regulators. These devices use a current-mode control architecture

with an integrated high-side power switch and a low-side synchro-

nous rectifier. The regulators target high performance applications

that require high efficiency and design flexibility.

The ADP2389/ADP2390 can operate with an input voltage from

4.5 V to 18 V and can regulate the output voltage to 0.6 V. Addi-

tional features added for design flexibility include programmable

switching frequency, programmable soft start, programmable

current limit, external compensation, precision enable, and a

power-good output.

CONTROL SCHEME

The ADP2389/ADP2390 use a fixed frequency, peak current

mode pulse-width modulation (PWM) control architecture. At

the start of each oscillator cycle, the high-side MOSFET turns

on, adding a positive voltage across the inductor. The current in

the peak inductor current threshold that turns off the high-side

MOSFET and turns on the low-side MOSFET. This action adds a

negative voltage across the inductor, causing the inductor current to

decrease. The low-side MOSFET remains on for the rest of cycle.

PFM MODE (ADP2390 ONLY)

The ADP2390 can work in PFM mode during a light load.

When the COMP pin voltage is below the PFM threshold

voltage, the device enters PFM mode. In PFM mode, the device

monitors the FB voltage to regulate the output voltage. Because

the high-side and low-side MOSFETs are turned off, the load

current discharges the output capacitor, causing the output

voltage to drop. When the FB voltage drops below 0.605 V, the

device begins switching and the output voltage increases as the

output capacitor is charged by the inductor current. When the

FB voltage exceeds 0.62 V, the device turns off both the high-side

and low-side MOSFETs until the FB voltage drops to 0.605 V. In

the PFM mode, the output voltage ripple is greater than the

ripple in the PWM mode.

PRECISION ENABLE/SHUTDOWN

The EN input pin has a precision analog threshold of 1.2 V (typical)

with 100 mV of hysteresis. When the enable pin (EN) voltage

exceeds 1.2 V, the regulator turns on; when it falls below 1.1 V

(typical), the regulator turns off. To force the regulator to start

automatically when input power is applied, connect the EN pin

to PVIN.

The precision EN pin has an internal pull-down current source

(5 µA) that provides a default turn off when the EN pin is open.

When the EN pin voltage exceeds 1.2 V (typical), the

ADP2389/ADP2390 are enabled and the internal pull-down

current source at the EN pin decreases to 1 µA, which allows

users to program the PVIN UVLO and hysteresis.

INTERNAL REGULATOR (VREG)

The on-board regulator provides a stable supply for the internal

circuits. Place a 1 µF, X7R or X5R ceramic capacitor between

the VREG pin and GND. The internal regulator includes a

current-limit circuit to protect the output if the maximum

external load current is exceeded.

BOOTSTRAP CIRCUITRY

The ADP2389/ADP2390 include a boot strap regulator to

provide the gate drive voltage for the high-side MOSFET. The

boot strap regulator uses differential sensing to generate a 5 V

bootstrap voltage between the BST pin and the SW pin.

Place a 0.1 µF, X7R or X5R ceramic capacitor between the

BST pin and the SW pin.

OSCILLATOR

GND can program the switching frequency according to the

following equation:

12

)

(k

000

,

67

(kHz)

+

Ω

=

T

SW

R

f

A 100 kΩ resistor sets the switching frequency to 600 kHz, and

a 44.2 kΩ resistor sets the switching frequency to 1.2 MHz.

2200

2000

0

200

400

600

800

1000

1200

1400

1600

1800

10

40

70 100 130 160 190 220 250 280 310 340

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