Data Sheet

ADP2389/ADP2390

OUTPUT CAPACITOR SELECTION

The output capacitor selection affects both the output ripple

voltage and the loop dynamics of the regulator.

During a step load transient, for instance, when the load is

suddenly increased, the output capacitor supplies the load until

the control loop ramps up the inductor current. The delay caused

by the control loop causes the output to undershoot. Use the

following equation to calculate the output capacitance required

to satisfy the voltage droop requirement:

(

)

UV

OUT

OUT

IN

STEP

UV

UV

OUT

V

V

V

L

I

K

C

_

2

_

2

∆

×

−

×

×

∆

×

=

where:

When a load is suddenly removed from the output and the

energy stored in the inductor rushes into the output capacitor,

the output overshoots. Calculate the output capacitance required to

meet the overshoot requirement using the following equation:

(

)

OUT

OV

OUT

OUT

STEP

OV

OV

OUT

V

V

V

L

I

K

C

−

∆

−

×

×

∆

×

=

_

2

_

2

where:

The output ripple is determined by the ESR and the value of the

capacitance. Use the following equations to select a capacitor

that can meet the output ripple requirements:

RIPPLE

OUT

SW

L

RIPPLE

OUT

V

f

I

C

_

_

8

∆

×

×

∆

=

L

RIPPLE

OUT

ESR

I

V

R

∆

∆

=

_

capacitor in ohms.

performance.

The selected output capacitor voltage rating must be greater

than the output voltage. The rms current rating of the output

capacitor must be greater than the value calculated using the

following equation:

12

_

L

RMS

COUT

I

I

∆

=

PROGRAMMING INPUT VOLTAGE UVLO

The ADP2389/ADP2390 have a precision enable input that

programs the UVLO threshold of the input voltage, as shown in

Figure 30.

Figure 30. Programming the Input Voltage UVLO

__

_

1.1 V

– 1.2 V

1.1 V 6.1μΑ – 1.2 V 1μA

IN RISING

IN FALLING

TOP EN

VV

R

××

=

×

×

where:

_

_

__

1.2 V

–

6.1μΑ – 1.2 V

TOP EN

BOT EN

IN RISING

TOP EN

R

R

VR

×

=

×

COMPENSATION DESIGN

For peak current mode control, the power stage can be simplified

as a voltage controlled current source supplying current to the

output capacitor and load resistor. It is composed of one

domain pole and a zero contributed by the output capacitor

ESR. The control to output transfer function is shown with the

following equations:













×

×

+













×

×

+

×

×

=

=

P

Z

VI

COMP

OUT

VD

f

s

f

s

R

A

s

V

s

V

s

G

π

π

2

1

2

1

)

(

)

(

)

(

where:

R is the load resistance.

OUT

ESR

Z

C

R

f

×

×

×

=

π

2

1

where:

(

)

OUT

ESR

P

C

R

R

f

×

+

×

×

=

π

2

1

EN

EN CMP

ADP2389/

ADP2390

1.2V

4.8µA

1.3µA

PVIN

Rev. 0 | Page 15 of 23