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USB4604 数据表(PDF) 40 Page - Microchip Technology |
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USB4604 数据表(HTML) 40 Page - Microchip Technology |
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40 / 62 page ![]() USB 2.0 HSIC Hi-Speed 4-Port Hub Controller Datasheet DS00001716A-page 40 2014 Microchip Technology Inc. write operation. Where color is visible in the figure, blue indicates signaling from the I2C master, and gray indicates signaling from the slave. In this operation, following the 7-bit slave address, the 8-bit register address is written indicating the start address for sequential write operation. Every subsequent access is a data write to a data register, where the register address increments after each access and an ACK from the slave occurs. Sequential write access is terminated by a Stop condition. 7.2.1.2 Sequential Access Reads The I2C interface supports direct reading of the device registers. In order to read one or more register addresses, the starting address must be set by using a write sequence followed by a read. The read register interface supports auto-increment mode. The master must send a NACK instead of an ACK when the last byte has been transferred. In this operation, following the 7-bit slave address, the 8-bit register address is written indicating the start address for the subsequent sequential read operation. In the read sequence, every data access is a data read from a data register where the register address increments after each access. The write sequence can end with optional Stop (P). If so, the read sequence must begin with a Start (S). Otherwise, the read sequence must start with a Repeated Start (Sr). Figure 7.8 shows the format of the read operation. Where color is visible in the figure, blue and gold indicate signaling from the I2C master, and gray indicates signaling from the slave. Figure 7.7 I2C Sequential Access Write Format Figure 7.8 I2C Sequential Access Read Format S 7-Bit Slave Address 0 P A nnnnnnnn Data value for XXXXXX ... nnnnnnnn A Data value for XXXXXX + y A xxxxxxxx A Register Address (bits 7-0) S 7-Bit Slave Address 1 n n n n n n n n P ACK ACK Register value for xxxxxxxx n n n n n n n n ACK Register value for xxxxxxxx + 1 ... n n n n n n n n NACK If previous write setting up Register address ended with a Stop (P), otherwise it will be Repeated Start (Sr) Register value for xxxxxxxx + y S 7-Bit Slave Address 0 P A xxxxxxxx A Register Address (bits 7-0) Optional. If present, Next access must have Start(S), otherwise Repeat Start (Sr) |
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