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USB4604 数据表(PDF) 7 Page - Microchip Technology |
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USB4604 数据表(HTML) 7 Page - Microchip Technology |
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7 / 62 page ![]() USB 2.0 HSIC Hi-Speed 4-Port Hub Controller Datasheet 2014 Microchip Technology Inc. DS00001716A-page 7 Chapter 1 General Description The USB4604 is a low-power, OEM configurable, MTT (Multi-Transaction Translator) USB 2.0 hub controller with 4 downstream ports and advanced features for embedded USB applications. The USB4604 is fully compliant with the USB 2.0 Specification, USB 2.0 Link Power Management Addendum, High-Speed Inter-Chip (HSIC) USB Electrical Specification Revision 1.0, and will attach to an upstream port as a Full-Speed hub or as a Full-/Hi-Speed hub. The 4-port hub supports Low-Speed, Full-Speed, and Hi-Speed (if operating as a Hi-Speed hub) downstream devices on all of the enabled downstream (non-HSIC) ports. HSIC ports support only Hi-Speed operation. The USB4604 has been specifically optimized for embedded systems where high performance, and minimal BOM costs are critical design requirements. Standby mode power has been minimized and reference clock inputs can be aligned to the customer’s specific application. Flexible power rail options ease integration into energy efficient designs by allowing the USB4604 to be powered in a single- source (VBUS, VBAT, 3.3V) or a dual-source (VBAT + 1.8, 3.3V + 1.8) configuration. Additionally, all required resistors on the USB ports are integrated into the hub, including all series termination and pull-up/pull-down resistors on the D+ and D– pins. The USB4604 supports both upstream battery charger detection and downstream battery charging. The USB4604 integrated battery charger detection circuitry supports the USB-IF Battery Charging (BC1.2) detection method and most Apple devices. These circuits are used to detect the attachment and type of a USB charger and provide an interrupt output to indicate charger information is available to be read from the device’s status registers via the serial interface. The USB4604 provides the battery charging handshake and supports the following USB-IF BC1.2 charging profiles: DCP: Dedicated Charging Port (Power brick with no data) CDP: Charging Downstream Port (1.5A with data) SDP: Standard Downstream Port (0.5A with data) Custom profiles loaded via SMBus or OTP The USB4604 provides an additional USB endpoint dedicated for use as a USB to I2C/SPI interface, allowing external circuits or devices to be monitored, controlled, or configured via the USB interface. Additionally, the USB4604 includes many powerful and unique features such as: FlexConnect, which provides flexible connectivity options. The USB4604’s downstream port 1 can be swapped with the upstream port, allowing master capable devices to control other devices on the hub. MultiTRAKTM Technology, which utilizes a dedicated Transaction Translator (TT) per port to maintain consistent full-speed data throughput regardless of the number of active downstream connections. MultiTRAKTM outperforms conventional USB 2.0 hubs with a single TT in USB full-speed data transfers. PortMap, which provides flexible port mapping and disable sequences. The downstream ports of a USB4604 hub can be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any port that is disabled, the USB4604 hub controllers automatically reorder the remaining ports to match the USB host controller’s port numbering scheme. PortSwap, which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the PCB. PHYBoost, which provides programmable levels of Hi-Speed USB signal drive strength in the downstream port transceivers. PHYBoost attempts to restore USB signal integrity in a compromised system environment. The graphic on the right shows an example of Hi- Speed USB eye diagrams before and after PHYBoost signal integrity restoration. VariSense, which controls the USB receiver sensitivity enabling programmable levels of USB signal receive sensitivity. This capability allows operation in a sub-optimal system environment, such as when a captive USB cable is used. |
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