UPD1002

DS00001760B-page 8

 2014 Microchip Technology Inc.

Note:

The buffer type for each signal is indicated in the BUFFER TYPE column of Table 2-2, "Pin Descriptions".

A description of the buffer types is provided in Section 2.3, "Buffer Types".

2.1.2

32-SQFN PIN ASSIGNMENTS

The UPD1002 32-SQFN provides four distinct pin configurations (32-P_A, 32-CP_B, 32-PC_A, and 32-PC_uAB) based

upon the CFG_SEL0 and CFG_SEL1 Configuration Select signals. These configurations are designed for specific appli-

cations, as outlined in Table 1-1, “UPD1002 Package/Pin Configuration Summary,” on page 6. The 32-SQFN package

pin assignments for each configuration are detailed in Table 2-1. For pin descriptions, refer to Section 2.2, "Pin Descrip-

tions". For example connection diagrams, refer to Section 2.4, "Power Connection Diagram," on page 22. For informa-

tion on the Configuration Select signals, refer to Section 3.3, "Configuration Selection (CFG_SEL0/CFG_SEL1)".

TABLE 2-1:

32-SQFN PACKAGE PIN ASSIGNMENTS

Pin

Number

Configuration

32-P_A

Pin Name

Configuration

32-CP_B

Pin Name

Configuration

32-PC_A

Pin Name

Configuration

32-PC_uAB

Pin Name

1

CFG_SEL0

2

CFG_SEL1

3

PD_EN

PD_EN

PD_GOOD

PD_GOOD

4

VDD33_CAP

5

VBUS

6

VSW_CAP

7

VTR

8

VDD18A_CAP

9

SPI_ROM_CE_N

10

SPI_ROM_CLK

11

SPI_ROM_DO

12

SPI_ROM_DI

13

VDDIO

14

VBUS_DISCHARGE

VBUS_DISCHARGE

EXT_PWR_DET

EXT_PWR_DET

15

INSERTION_DETECT

VSEL0_N

INSERTION_DETECT

NC

16

PD_DETECT

VSEL1_N

PD_DETECT

NC

17

VMON

18

IMON

19

VDDIO

20

VDD18_CAP

21

PD_VDD18

22

HUB_PWR_EN

VSEL2_N

HUB_PWR_EN

HUB_PWR_EN

23

PD_ID

24

PD_DATA

25

CHG_EMU_EN

VSAFEDB_EN

PPC_PWR_EN

PPC_PWR_EN

26

TEST

27

RESET_N