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SRK2001 数据表(PDF) 12 Page - STMicroelectronics

部件名 SRK2001
功能描述  Adaptive synchronous rectification controller for LLC resonant converter
PDF  22 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

SRK2001 数据表(HTML) 12 Page - STMicroelectronics

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Operation description
SRK2001
12/22
DocID027367 Rev 3
Figure 8. Adaptive turn-off
Figure 8 shows this adaptive algorithm: cycle-by-cycle the conduction time is maximized
allowing in a steady-state the maximum converter efficiency.
During the start-up and on sleep mode exiting, the control circuit turns off the SR MOSFET
at 50% of the clock cycle and progressively adapts this delay in order to maximize the SR
MOSFET conduction time. This helps reducing system perturbations.
5.4
ZCD comparator
The IC is equipped with a ZCD comparator that is always ready to quickly turn-off the SR
MOSFETs, avoiding in this way current inversion, that would cause SR MOSFETs failure
and even half bridge destruction, in case of the primary controller not equipped with proper
protections.
The ZCD (zero current detection) comparator acts during fast load transitions or the short-
circuit operation and when the above resonance operation occurs. It senses that the current
has reached the zero level and triggers the gate drive circuit for a very fast MOSFET turn-off
(with a total delay time TD_Off).
The ZCD comparator threshold is not fixed but self-adaptive.
In the steady-state load operation and in case of slow load transitions, the turn-off is
prevalently managed by the adaptive mechanism (characterized by the two slope turn-off
driving). Instead, during fast transitions or during above resonance operation, the ZCD_OFF
comparator will take over, causing a fast MOSFET switch-off that prevents undesired
current inversions.
The ZCD_OFF comparator is blanked for 450 ns after the turn-on.
Depending on SR MOSFET choice, some premature turn-off triggered by the ZCD_OFF
comparator may be found due to the noise present on the drain-source sensed signal: this is
worse with lower RDS_ON (due to worse signal to noise ratio) and lower stray inductance of
the MOSFET package. Normally the load level where this may happen is such that the
circuit has already entered a low consumption state (for example in burst mode from primary
controller); if this is not the case, some noise reduction may be helpful, for example by using
RC snubbers across the SR MOSFETs drain-source.



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