Operation description

SRK2001

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DocID027367 Rev 3

occupies almost 100% of the half-switching cycle, as the load is reduced, the conduction

enters the sleep mode. To prevent wrong decisions, the sleep mode condition must be

confirmed for 512 consecutive clock cycles.

Once in the sleep mode, SR MOSFET gate driving is re-enabled when the conduction duty

number of clock cycles needed to exit the sleep mode is proportional to the difference

allows a faster sleep-out in case of the heavy load transient low-to-high.

Furthermore, in order to reduce the perturbation introduced by a sudden sleep mode state

entering, a soft-sleep transition procedure is adopted, that progressively decreases the

conduction time before entering the sleep mode state.

After entering the sleep mode, timing is ignored for 8 switching cycles respectively to let the

resulting transient in the output current fade-out, then the timing check is enabled.

The automatic sleep mode function can be disabled by the EN pin (see Section 5.7): this

may be beneficial to the overall system behavior in case of conflict with the burst mode

operation of the half bridge converter driven by the primary controller.

5.7

EN and PROG pins: function and usage

The EN pin and PROG pin allow the user to configure two different operating modes:



Automatic sleep mode function enabled (described in Section 5.6)



Automatic sleep mode function disabled

The configuration choice is done during the startup phase (when the supply voltage reaches

During the run mode the EN pin can be used as remote on-off input as well (both operating

modes), using a small signal transistor connected to the pin as shown in Figure 9: when the

operating and enters a low consumption state; it resumes the operation when the switch is

to be open during the startup phase.