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M24M02-DRMN6TP 数据表(PDF) 13 Page - STMicroelectronics |
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M24M02-DRMN6TP 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 38 page ![]() DocID18204 Rev 8 13/38 M24M02-DR Device operation 37 4.5 Device addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 3 (most significant bit first). When the device select code is received, the device only responds if the Chip Enable Address is the same as the value on the Chip Enable (E2) input. The 8th bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations. If a match occurs on the device select code, the corresponding device gives an acknowledgment on Serial Data (SDA) during the 9th bit time. If the device does not match the device select code, it deselects itself from the bus, and goes into Standby mode. Table 3. Device select code Device type identifier(1) 1. The most significant bit, b7, is sent first. Chip Enable MSB address bits RW b7 b6 b5 b4 b3 b2 b1 b0 Device select code when addressing the memory array 10 10 E2(2) 2. E2 bit value is compared to the logic level applied on the input pin E2. A17 A16 RW Device select code when addressing the Identification page 10 11 E2(2) XX RW |
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