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M24M02-DR

DC and AC parameters

37

Table 13. 400 kHz AC characteristics

Symbol

Alt.

1. Test conditions (in addition to those specified under Operating conditions and AC test measurement

conditions in Section 8: DC and AC parameters).

Min.

Max.

Unit

Clock frequency

-

400

kHz

Clock pulse width high

600

-

ns

Clock pulse width low

1300

-

ns

2. Characterized only, not tested in production.

SDA (out) fall time

120

ns

Input signal rise time

(4)

4. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the

I²C specification that the input signal rise and fall times be more than 20 ns and less than 300 ns when

(4)

ns

Input signal fall time

(4)

(4)

ns

100

-

ns

0

-

ns

undefined region of the falling edge SCL.

Data out hold time

100

-

ns

Clock low to next data valid (access time)

100

900

ns

600

-

ns

600

-

ns

600

-

ns

Time between Stop condition and next Start

condition

1300

-

ns

7. WC=0 set up time condition to enable the execution of a WRITE command.

0

-

µs

8. WC=0 hold time condition to enable the execution of a WRITE command.

1

-

µs

Write time

-

10

ms

tNS(2)

-

Pulse width ignored (input filter on SCL and

SDA) - single glitch

-80

ns