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M24M02-DRMN6TP 数据表(PDF) 25 Page - STMicroelectronics

部件名 M24M02-DRMN6TP
功能描述  2-Mbit serial IC bus EEPROM
PDF  38 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M24M02-DRMN6TP 数据表(HTML) 25 Page - STMicroelectronics

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M24M02-DR
DC and AC parameters
37
Table 10. Cycling performance
Symbol
Parameter
Test condition
Max.
Unit
Ncycle
Write cycle
endurance(1)
1. The write cycle endurance is defined for group of four bytes located at addresses [4*N, 4*N+1, 4*N+2,
4*N+3] where N is an integer. The Write cycle endurance is defined by characterization and qualification.
TA ≤ 25 °C, VCC(min) < VCC < VCC(max)
4,000,000
Write cycle(2)
2. A Write cycle is executed when either a Page Write, a Byte write, a Write Identification Page or a Lock
Identification Page instruction is decoded. When using the Byte Write, the Page Write or the Write
Identification Page, refer also to Section 5.1.5: ECC (Error Correction Code) and Write cycling
TA = 85 °C, VCC(min) < VCC < VCC(max)
1,200,000
Table 11. Memory cell data retention
Parameter
Test condition
Min.
Unit
Data retention(1)
1. For products identified by process letter K. The data retention behavior is checked in production, while the
200-year limit is defined from characterization and qualification results.
TA = 55 °C
200
Year



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