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POWERSTEP01 数据表(PDF) 67 Page - STMicroelectronics |
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POWERSTEP01 数据表(HTML) 67 Page - STMicroelectronics |
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67 / 92 page ![]() DocID025022 Rev 5 67/92 powerSTEP01 Programming manual 92 The SW_MODE bit sets the external switch to act as HardStop interrupt or not: The OC_SD bit sets if an overcurrent event causes or not the bridges to turn-off; the OCD flag in status register is forced low anyway: The VCCVAL bit set the internal VCC regulator output voltage: 0 111 External crystal or resonator: 32 MHz Crystal/resonator driving Crystal/resonator driving 1 100 Ext clock source: 8 MHz (crystal/resonator driver disabled) Clock source Supplies inverted OSCIN signal 1 101 External clock source: 16 MHz (crystal/resonator driver disabled) Clock source Supplies inverted OSCIN signal 1 110 External clock source: 24 MHz (crystal/resonator driver disabled) Clock source Supplies inverted OSCIN signal 1 111 External clock source: 32 MHz (crystal/resonator driver disabled) Clock source Supplies inverted OSCIN signal Table 41. Oscillator management (continued) EXT_CLK OSC_SEL [2 … 0] Clock source OSCIN OSCOUT Table 42. External switch hard stop interrupt mode SW_MODE Switch mode 0 HardStop interrupt 1 User disposal Table 43. Overcurrent event OC_SD Overcurrent event 1 Bridges shut down 0 Bridges do not shut down Table 44. Programmable VCC voltage regulator output VCCVAL VCC voltage 0 7.5 V 115 V |
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