POWERSTEP01 datasheet(19/92 Pages) STMICROELECTRONICS

部件名	POWERSTEP01

功能描述	System-in-package integrating microstepping controller and 10 A power MOSFETs

PDF	92 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

19 / 92 page

DocID025022 Rev 5

19/92

powerSTEP01

Pin list

SDI

Logic input

Data input pin for serial interface

Logic input

Serial interface clock

Logic input

Chip select input pin for serial interface

BUSY

/SYNC

Open-drain

output

By default BUSY/SYNC pin is forced low when the device

is performing a command.

The pin can be programmed in order to generate

a synchronization signal.

FLAG

Open-drain

output

Status flag pin. An internal open-drain transistor can pull

the pin to GND when a programmed alarm condition

occurs (step loss, OCD, thermal pre-warning or shutdown,

UVLO, wrong command, non performable command).

STBY

/RESET

Logic input

Standby and reset pin. LOW logic level puts the device in

standby mode and reset logic.

If not used, should be connected to VREG

STCK

Logic input

Step clock input.

Table 5. Pin description (continued)

No.

Name

Type

Function

POWERSTEP01 数据表(PDF) 19 Page - STMicroelectronics

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