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ST-PLC-AFE 数据表(PDF) 41 Page - STMicroelectronics |
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ST-PLC-AFE 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 58 page ![]() DocID028727 Rev 1 41/58 ST-PLC-AFE Application information 58 10.2 Thermal considerations When the ST-PLC-AFE transmits information on low-impedance, power-line domains, more power is dissipated which leads to junction temperature increase. If the junction temperature reaches 160 °C, the thermal protection latches to freeze the transmission. This is why good PCB design and correct management of the heat flow from the ST-PLC-AFE is necessary to minimize losses and decrease system temperature, extend device operating life, and maximize performance. 10.2.1 Maximizing the heat flow from the junction temperature to the PCB The package of the ST-PLC-AFE is a QFN48-pin with an exposed PAD. The majority of heat is evacuated through the exposed PAD, on the underside of the package, which is why the package must be soldered to the PCB thermal pad with the lowest resistivity possible. The thermal pad should be the same size as the exposed pad and multiple vias. 10.2.2 Reducing the PCB thermal resistance This can be done by increasing the number of layers, using thicker copper, and/or increasing the PCB area. The figures below show PCB examples of thermal resistance as a function of the number of PCB layers, PCB area, and copper thickness. Figure 42. Thermal resistance as a function of the number of layers in the PCB |
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