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STA016T 数据表(PDF) 15 Page - STMicroelectronics |
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STA016T 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 45 page ![]() 15/45 STA016T 3 REGISTER DESCRIPTION 3.1 VERSION registers description VERSION : Address : 0x00 (0) Type : RO - DWT Software Reset : 0x10 Hardware Reset : 0x10 Description : The VERSION register is Read-only and it is used to identify the IC on the application board. IDENT : Address : 0x01 (1) Type : RO - DWT Software Reset : 0xAC Hardware Reset : 0xAC Description : IDENT is a read-only register and it is used to identify the IC on an application board. IDENT always has the value 0xAC. SOFT_VERSION : Address : 0xD3 (211) Type : RO - DWT Software Reset : X Description : The SOFT_VERSION register is Read-only and it is used to identify the software running on the IC. 3.2 PLL_AUDIO_CONFIGURATION registers description PLL_AUDIO_PEL_192 : Address : 0xDC (220) Type : RW - DEC Software Reset : 58 Description : This register must contain a PEL value that enables the audio PLL to generate a frequency of ofact*192 kHz for the PCMCK.See table 1, 2 & 3. ofact is the oversampling factor needed by the DAC (ofac==246 or ofac==384). Default value at soft reset assume : – ofact == 256 – external crystal provide a CRYCK running at 14.31818 MHz PLL_AUDIO_PEH_192 : Address : 0xDD (221) Type : RW - DEC Software Reset : 187 Description : This register must contain a PEH value that enables the audio PLL to generate a frequency of ofact*192 kHz for the PCMCK.See table 1, 2 & 3. Default value at soft reset assume : – ofact == 256 – external crystal provide a CRYCK running at 14.31818 MHz PLL_AUDIO_NDIV_192 : Address : 0xDE (222) Type : RW - DEC Software Reset : 0 b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 1010 11 00 b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 |
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