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SWCS049G 数据表(PDF) 47 Page - Texas Instruments |
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SWCS049G 数据表(HTML) 47 Page - Texas Instruments |
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47 / 119 page  47 TPS659110, TPS659112, TPS659113 TPS659114, TPS659118, TPS6591133 www.ti.com SWCS049Q – JUNE 2010 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133 Detailed Description Copyright © 2010–2016, Texas Instruments Incorporated Table 6-2. Boot Configuration: Power Sequence Control Bits Register Bit Description TPS65911x Fixed Boot EEPROM Boot VDD1_OP_REG/ VDD1_SR_REG VDD1 voltage level selection for boot. Levels available: 1.2 V x 0.6/0.7/0.8/0.85/0.9/0.95/.../1.35/1.4/1.5 V VDD1_REG VGAIN_SEL VDD1 gain selection, ×1 or ×2 ×1 x EEPROM VDD1 time slot selection 3 x DCDCCTRL_REG VDD1_PSKIP VDD1 pulse skip mode enable Enable skip x VDD2_OP_REG/ VDD2_SR_REG VDD2 voltage level selection for boot. Levels available: 1.5 V x 0.6/0.7/0.8/0.85/0.9/0.95/.../1.35/1.4/1.5 V VDD2_REG VGAIN_SEL VDD2 gain selection, ×1 or ×3 ×1 x EEPROM VDD2 time slot selection 6 x DCDCCTRL_REG VDD2_PSKIP VDD2 pulse skip mode enable Enable skip x VIO_REG SEL[3:2] VIO voltage selection 1.8 V x EEPROM VIO time slot selection 4 x DCDCCTRL_REG VIO_PSKIP VIO pulse skip mode enable Enable skip x VDDCtrl_OP_REG/ VDDCtrl_SR_REG VDDCtrl voltage level selection for boot. Levels available: Off x 0.6/0.7/0.8/0.85/0.9/0.95/../1.35/1.4 V EEPROM VDDCtrl time slot selection Off x LDO1_REG SEL[7:2] LDO1 voltage selection 1.05 V x EEPROM LDO1 time slot Off x LDO2_REG SEL[7:2] LDO2 voltage selection 1.2 V x EEPROM LDO2 time slot 7 x LDO3_REG SEL[6:2] LDO3 voltage selection LDO3 voltage: 1 V x EEPROM LDO3 time slot Off x LDO4_REG SEL[7:2] LDO4 voltage selection 1.2 V x EEPROM LDO4 time slot 2 x LDO5_REG SEL[6:2] LDO5 voltage selection LDO5 voltage: 1 V x EEPROM LDO5 time slot Off x LDO6_REG SEL[6:2] LDO6 voltage selection LDO6 voltage: 1 V x EEPROM LDO6 time slot Off x LDO7_REG SEL[6:2] LDO7 voltage selection 1.2 V x EEPROM LDO7 time slot 5 x LDO8_REG SEL[6:2] LDO8 voltage selection 1.0 V x EEPROM LDO8 time slot 7 x CLK32KOUT pin CLK32KOUT time slot 5 x NRESPWRON, NRESPWRON2 pin NRESPWRON time slot 10 x GPIO0 pin GPIO0 time slot 1 x GPIO2 pin GPIO2 time slot Off x GPIO6 pin GPIO6 time slot 6 x GPIO7 pin GPIO7 time slot 5 x |
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