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PI4GTL2002XTEX 数据表(PDF) 4 Page - Pericom Semiconductor Corporation |
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PI4GTL2002XTEX 数据表(HTML) 4 Page - Pericom Semiconductor Corporation |
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4 / 12 page ![]() ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| 2016-01-0001 PT0579 01/27/16 4 PI4GTL2002 2-bit bidirectional low voltage translator DC Electrical Characteristics TA = -40 C to +85 C; unless otherwise specified Parameter Description Test Conditions (1) Min Typ. (2) Max Unit Input and output DB and SB VIK input clamping voltage II = -18mA; VGREF = 0 V - - -1.2 V IIH HIGH-level input current VI = 5 V; VGREF = 0 V - - 5 µA CGREF input capacitance on pin GREF VI = 3 V or 0 V - 11 - pF Cio(off) off-state input/output capacitance (Sn, Dn) VO = 3 V or 0 V; VGREF = 0 V - 4 - pF Cio(on) on-state input/output capacitance (Sn, Dn) VO = 3 V or 0 V; VGREF = 3 V - 10.5 - pF Ron ON-state resistance (2) (Sn, Dn) VI = 0V; IO = 64mA VGREF = 4.5 V - 3.5 5.5 Ω VGREF = 3 V - 4.7 7.0 Ω VGREF = 2.3 V - 6.3 9.5 Ω VGREF = 1.5 V - 60 140 Ω VI = 2.4V; IO = 15mA VGREF = 4.5 V 1 6 15 Ω VGREF = 3 V 20 60 140 Ω VI = 1.7V; IO = 15mA VGREF = 2.3 V 20 60 140 Ω Notes: 1) All typical values are at TA = 25 °C. 2) Measured by the voltage drop between the S1 and S2, or D1 and D2 terminals at the indicated current through the switch. ON-state resistance is determined by the lowest voltage of the two terminals. Dynamic characteristics TA = -40 C to +85 C; unless otherwise specified. Values guaranteed by design. Symbol Parameter Conditions CL = 50 pF CL = 30 pF CL = 15 pF Unit Min Max Min Max Min Max VGREF = 3.3 V; VH = 3.3 V; VL = 0 V; VM = 1.15 V tPLH LOW-to-HIGH propagation delay from (input) S2 or D2 to (output) S1 or D1 0 0.8 0 0.6 0 0.3 ns tPHL HIGH-to-LOW propagation delay from (input) S2 or D2 to (output) S1 or D1 0 1.2 0 1 0 0.5 ns VGREF = 2.5 V; VH = 2.5 V; VL = 0 V; VM = 0.75 V tPLH LOW-to-HIGH propagation delay from (input) S2 or D2 to (output) S1 or D1 0 1 0 0.7 0 0.4 ns tPHL HIGH-to-LOW propagation delay from (input) S2 or D2 to (output) S1 or D1 0 1.3 0 1 0 0.6 ns VGREF = 3.3 V; VH = 2.3 V; VL = 0 V; VT = 3.3 V; VM = 1.15 V; RL = 300 Ω tPLH LOW-to-HIGH propagation delay ffrom (input) S1 orD1 to (output) S2 or D2 0 0.9 0 0.6 0 0.4 ns tPHL HIGH-to-LOW propagation delay from (input) S1 or D1 to (output) S2 or D2 0 1.4 0 1.1 0 0.7 ns VGREF = 2.5 V; VH = 1.5 V; VL = 0 V; VT = 2.5 V; VM = 0.75 V; RL = 300 Ω tPLH LOW-to-HIGH propagation delay from (input) S1 orD1 to (output) S2 or D2 0 1 0 0.6 0 0.4 ns tPHL HIGH-to-LOW propagation delay from (input) S1 or D1 to (output) S2 or D2 0 1.3 0 1.3 0 0.8 ns |
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